November 2017 - Semiconductor Engineering


More Volatility Ahead


The entire semiconductor industry had a wild ride on the stock market this week, plunging on Wednesday and recovering on Thursday. This is just a sign of things to come. The cause of this week's volatility can be tied directly to a Morgan Stanley report, which said that NAND prices have peaked and will begin dropping at the beginning of 2018 because supply has caught up with demand. The repo... » read more

Heterogeneous Cache Coherence Requires A Common Internal Protocol


Machine learning and artificial intelligence systems are driving the need for systems-on-chip containing tens or even hundreds of heterogeneous processing cores. As these systems expand in size and complexity, it becomes too difficult to manage data flow solely through software means. An approach that simplifies software while improving performance and power consumption is to implement hardware... » read more

How To Use CFD To Test And Analyze A Chip Package


By Prasad Tota and Robert Day Throughout the electronics industry, submicron feature size at the die level are driving package component sizes down to the design-rule level of the early technologies. Today’s integrated circuit (IC) package technology must deliver higher lead counts, reduced lead pitch, minimum footprint area, and significant volume reduction, which has led to semiconductor... » read more

5 Pitfalls That May Kill The IoT


A couple of weeks ago I participated in a panel titled “The Road to a Trillion Devices” organized by Brian Fuller at Arm TechCon. His closing question was whether we will get to the projected trillion devices in twenty years. My answer was that we may even get there faster. His opening question was what the pitfalls would be to make it difficult to get to trillion devices in the next twenty... » read more

Using FPGAs For Emulation


For many years, emulators were available only to verification teams working on the largest projects in companies with deep enough pockets. Due to size rather than capabilities they were called “Big Box” emulators and typically were used in order to recover some of the time lost on RTL simulation. Meanwhile, FPGA technology has been available long enough to mature to the point where FPGA bas... » read more

Prototyping Partitioning Problems


Gaps are widening in the prototyping of large, complex chips because the speed and capacity of the FPGA is not keeping pace with rapid rollout pace of advanced ASICs. This is a new twist for a well-established market. Indeed, prototyping with FPGAs is as old as the [gettech id="31071" t_name="FPGAs"] themselves. Even before they were called FPGAs, logic accelerators or LCAs (logic cell ar... » read more

The Uncontrolled Rise Of Functional Safety Standards


Over the past 30 years, advances in software and hardware have made it possible to create sophisticated systems controlling crucial aspects of complex equipment, from rolling and pitching in aircrafts, to steering and braking in cars. The processes and methods defined in functional safety standards are crucial to ensure that these systems behave as expected and safely, even when certain parts �... » read more

Going On A Quest


Over the extended Thanksgiving weekend, I went with my family to a hotel with built-in entertainment. The hotel had so many amenities as to make sure that you would never want to leave it: a water park, an arcade, multiple restaurants, miniature golf, and the list goes on. The water park was the main attraction and ensured multiple hours of fun for the entire family each day. A wave pool, in... » read more

One-On-One: Mike Muller


Arm CTO Mike Muller sat down with Semiconductor Engineering to discuss a wide range of technology and market shifts, including the impact of machine learning, where new market opportunities will show up and how the semiconductor industry will need to change to embrace them. What follows are excerpts of that conversation. SE: It's getting to the point where instead of just developing chips, w... » read more

Tech Talk: Verification


Frank Schirrmeister, Cadence's senior group director for verification platforms, talks about what's changing in verification with 5G, machine learning, greater connectivity, advanced packaging, and the growing need to build security into designs. https://youtu.be/GMF8BkmdJzE » read more

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