Just how real is 3D stacking and what are the main hurdles that need to be solved.
Semiconductor Manufacturing & Design examines the myth and reality of 3D stacking–and the hurdles that still need to be solved. In the hot seat: VC Jim Hogan; eSilicon’s Prasad Subramanian; Sonics’ Drew Wingard; Atrenta’s Mike Gianfagna, and Mentor Graphics’ Michael White.
Less precision equals lower power, but standards are required to make this work.
Open source by itself doesn’t guarantee security. It still comes down to the fundamentals of design.
New applications require a deep understanding of the tradeoffs for different types of DRAM.
Ensuring that your product contains the best RISC-V processor core is not an easy decision, and current tools are not up to the task.
What is it, why is it important, and why now?
How prepared the EDA community is to address upcoming challenges isn’t clear.
Advanced etch holds key to nanosheet FETs; evolutionary path for future nodes.
Details on more than $500B in new investments by nearly 50 companies; what’s behind the expansion frenzy, why now, and challenges ahead.
From specific design team skills, to organizational and economic impacts, the move to bespoke silicon is shaking things up.
Less precision equals lower power, but standards are required to make this work.
New memory approaches and challenges in scaling CMOS point to radical changes — and potentially huge improvements — in semiconductor designs.
Open-source processor cores are beginning to show up in heterogeneous SoCs and packages.
Open source by itself doesn’t guarantee security. It still comes down to the fundamentals of design.
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