Addressing The Challenges Of Automotive Motor Control

By Andrew Talan and Ahmed Eisawy

As you leave work today and enter the parking lot, you hit the unlock button on your car remote. Using the power lift to open the hatch back, you put your laptop bag in the back of the car. While seated in the car, you adjust your seat position and bump your driver-side mirror into a new position and then head for home. You probably don’t think much about your actions, but all of the motors that you absent-mindedly engaged are managed using a motor controller IC.

Motor controller IC design and verification is a challenging task. These chips must work flawlessly for over 10 years in harsh environments that include -40° C to 150° C temperatures. The motors that they control require voltages from 7V to 40V. And, these ICs are subject to potential electrostatic discharge and electromagnetic conditions. In addition, controlling many motors from a single chip means that there are numerous combinations of parameters and conditions to verify before the chip can be deployed into the automotive market.

Let’s examine a particular motor controller IC designed and marketed by ON Semiconductor:

In this application of the IC, we can see the ability to control 5 motors in a car. The controller supports parallel and serial interfaces, has three power supplies with high-voltage I/O pins, provides programmable functions, and it includes output protection. The IC controls external, high-current MOSFETs. The chip is implemented using the bipolar, CMOS, DMOS (BCD) technology which is widely-adopted by automotive chip designers. The BCD technology supports high-voltage to drive external loads using DMOS, analog circuits to interface digital logic to the external world using bipolar, and digital logic using CMOS technology.

Verification Challenges

The design of the motor controller IC involved many designers working to solve verification challenges:

• Large input and output command register set. The automotive designer can program 24 programmable input register bits and each need to be verified in simulation. Each bit controls a function that is stored in a 16-bit register. The designer uses serial peripheral interface (SPI) commands to program the current settings of the IC. These control the gate charge timing to reduce electromagnetic interference emissions and to control fault timing. In addition, all output status register functions had to be verified.
• Many SPI modes of operation. There are 33 settings for high-side gate currents and 16 settings for low-side gate currents, for a total of 49 settings. Additionally, the IC has a high voltage shutdown at around 20V with a survival requirement from 20V to 40V where it needs to protect itself and the external FETs. Therefore, the verification team needed to run simulations on all of these settings, and verify several shutdown modes and forbidden SPI commands. The team needed to look for reported faults in the output status registers. The simulation of all 49 charge and discharge current levels were required to complete in a timely manner.
• Multitude of parametric specifications. The parametric specifications needed to be simulated for worst-case analysis of power, temperature, and voltage (PVT) at the block levels of the design.

Verification Approach

The ON Semiconductor verification team employed this analog design flow using tools from Mentor Graphics:

The designers used Pyxis to quickly connect the top-level schematic nets. Because the IC is mixed-signal and contains complex serial and parallel interfaces with a large number of programmable settings, there are many top-level nets to verify that can result in long simulation run times. And, any time there is a design change, these simulations needed to be re-run.

Eldo provided fast simulations that can be combined with processor multithreading. This allows for efficient simulation of the design under various conditions in a timely manner. Advanced, user-defined measurements were used to verify all the worst-case corners that needed the designer’s attention.

Questa ADMS was used to verify digital designs, digital cores, and Verilog stimulus. This tool is useful for debugging and verifying digital/analog issues and it works with custom Verilog stimulus. The designers wrote Verilog code, created a symbol, and registered the model in order to use it in simulations. The team made a SPI port generator that was used to communicate with the IC. This allowed the designers to focus more on design issues and this also served as a clever way to document what the simulation was verifying. Verilog stimulus was copied, shared, or used independently, allowing the top-level simulation work load to be shared between the entire team.

Verification Results

At the conclusion of the project, ON Semiconductor analyzed the verification results and determined:

• Eldo Premier completed the verification of the 49 charge and discharge current levels in a timely manner (1 hour and 33 minutes).
• Questa ADMS ran the mixed-signal simulations efficiently and allowed reuse of testbenches and stimulus.

The team compared the validated silicon results to simulation results and were pleased to report close correlation. For example, for the positive current out of Channel 1:

Automotive motor controller ICs using advanced BCD processes are challenging to design and verify due to the harsh environments in which they operate. The circuit verification flow needs to accurately verify all charge and discharge current levels in a timely manner, covering worst case analysis for process, temperature, and voltage. The use of the Mentor design flow was essential to the design and verification of automotive motor controller ICs as the tools deliver the required SPICE accuracy and performance to verify the entire mixed-signal design. The combined solution with Questa ADMS brings debug and visualization capabilities that are essential to address all digital/analog issues with seamless reuse of analog and digital models, stimulus, and testbenches.

To learn more about this automotive motor controller project, view the video.

Andrew Talan is a Design Engineer for Automotive Product Design at ON Semiconductor.