Mixed-Signal Issues Worse At 10/7nm


Despite increasingly difficulty in scaling digital logic to 10/7nm, not all designs at the leading edge are digital. In fact, there are mixed-signal components in designs at almost all nodes down to 10/7nm. This may seem surprising because analog scaling has been an issue since about 90nm, but these are not traditional analog components. Analog IP increasingly includes highly integrated, mix... » read more

Foundry Challenges in 2018


The silicon foundry business is expected to see steady growth in 2018, but that growth will come with several challenges. On the leading edge, GlobalFoundries, Intel, Samsung and TSMC are migrating from the 16nm/14nm to the 10nm/7nm logic nodes. Intel already has encountered some difficulties, as the chip giant recently pushed out the volume ramp of its new 10nm process from the second half ... » read more

Noise At 7nm And Beyond


The digital and analog worlds always have been very different. Digital engineers see the world in terms of electrons and a well-defined set of numerical values. Their waves are discrete and squared off and their devices are often noisy when they turn on and off. Analog engineers think in terms of quiet, smooth waves, and they are very concerned about anything that can disrupt those waves, such ... » read more

Shortages Hit Packaging Biz


Rising demand for chips is hitting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, leadframes and even some equipment. Spot shortages for some IC packages began showing up earlier this year, but the problem has been growing and spreading since then. Supply imbalances reached a boiling point in the third and fourth quarters of this yea... » read more

New Drivers For I/O


Interface standards are on a tear, and new markets are pushing the standards in several directions at the same time. The result could be a lot more innovation and some updates in areas that looked to be well established. Traditionally, this has been a sleepy and predictable part of the industry with standards bodies producing updates to their interfaces at a reasonable rate. Getting data int... » read more

Mixed Messages For Mixed-Signal


There is no such thing as a purely digital design at advanced nodes today. Even designs that have no [getkc id="37" kc_name="analog"] content are likely relying on [getkc id="38" kc_name="mixed-signal"] components such as SerDes for communications, or voltage regulators for adaptive power control. But the days of purposely attempting to integrate everything including analog and RF onto a single... » read more

Fusing CMOS IC And MEMS Design For IoT Edge Devices


Creating a sensor-based IoT edge device is challenging, due to the multiple design domains involved (Analog, digital, RF, and MEMS). But, creating an edge device that combines the electronics using the traditional CMOS IC flow and a MEMS sensor on the same silicon die can seem impossible. In fact, many IoT edge devices combine multiple dies in a single package, separating electronics from the M... » read more

Data Management For Mixed-Signal Designs


Software teams have long used version control and data management systems and they have become an integral part of a so ware development environment. Practically, no significant software project is started without a software data management system and methodology in place. There are a variety of solutions, typically referred to as Software Configuration Management (SCM) systems, to choose from ... » read more

Wednesday At DAC


Wednesday at DAC started off in usual fashion with a keynote. For the third day, the focus of the talk was the IoT and how significant the change is going to be. Tyson Tuttle, CEO of Silicon Labs, was the speaker. While there are a lot of figures about how many devices will be connected in the future, Tuttle put it into a different perspective. "There will 70B connected devices by 2025 worth $... » read more

Modeling On-Chip Variation At 10/7nm


Simulation, a workhorse tool for semiconductor design, is running out of steam at 10/7nm. It is falling behind on chips with huge gate counts and an enormous number of possible interactions between all the different functions that are being crammed onto a die. At simulation's root is some form of SPICE, which has served as its underpinnings ever since SPICE was first published 44 years ago. ... » read more

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