How to validate a self-driving car’s safety.
Autonomous driving systems rely upon sensors and embedded software for localization, perception, motion planning and execution. Autonomous driving systems can only be released to the public after developers have demonstrated their ability to achieve extremely high levels of safety. Today’s hands-off autonomous driving systems are largely built with deep learning algorithms that can be trained to make the right decision for nearly every driving situation. These systems, however, lack the detailed requirements and architecture that have been used up to now to validate safety-critical software, such as that which controls commercial airliners. Road testing is clearly an essential part of the development process, but billions of miles of road testing would be required to validate the safety of autonomous driving systems and software.
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Yield rises with mask protection; multiple sources will likely reduce costs.
More heterogeneous designs and packaging options add challenges across the supply chain, from design to manufacturing and into the field.
An ecosystem is required to make chiplets a viable strategy for long-term success, and ecosystems are built around standards. Those standards are beginning to emerge today.
Computational storage approaches push power and latency tradeoffs.
24 startups raise over $1.3B; self-driving companies prepare to launch products.
The backbone of computing architecture for 75 years is being supplanted by more efficient, less general compute architectures.
How long a chip is supposed to function raises questions design teams need to think about, including how much they trust aging models.
Servers today feature one or two x86 chips, or maybe an Arm processor. In 5 or 10 years they will feature many more.
Tradeoffs in AI/ML designs can affect everything from aging to reliability, but not always in predictable ways.
New technology could have an impact on NVM, in-memory processing, and neuromorphic computing.
But one size does not fit all, and fine-tuning is required.
Advanced nodes and packaging are turning minor issues into major ones.
Challenges persist for DRAM, flash, and new memories.
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