Learn how to effectively manage design specifications (performance) and margins (price) with an accurate and predictive simulation-driven chip–package–system convergence methodology.
This paper presents solutions for effectively managing design specifications (performance) and margins (price). It discusses solutions based on accurate and predictive simulation software from ANSYS and Apache that offers electronics designers a simulation-driven chip–package–system convergence methodology.
To download this white paper, click here.
30 facilities planned, including 10/7nm processes, but trade war and economic factors could slow progress.
Leaders of three R&D organizations, Imec, Leti and SRC, discuss the latest chip trends in AI, packaging and quantum computing.
Applied Materials’ VP looks at what’s next for semiconductor manufacturing and the impact of variation, new materials and different architectures.
What could make this memory type stand out from the next-gen memory crowd.
Researchers digging into ways around the von Neumann bottleneck.
Semiconductor devices face many hazards before and after manufacturing that can cause them to fail prematurely.
2019 will be a year of change for the semiconductor industry as new fields drive technological advancements.
Stacking die is garnering more attention, but design flows aren’t fully ready to support it.
What hoops will designers have to jump through to avoid concurrency bugs?
Maximum flexibility is no longer the reliable path to product success. While flexibility must be there for a purpose, it also can be a liability.
Why managing power is becoming more difficult, more critical, and much more expensive.
This new communications standard could transform architectural decisions across the industry, but not right away and not necessarily in obvious ways.
Accuracy is a relative term that complicates design and verification. Machine learning makes the industry face some of those realities head on.
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