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Author's Latest Posts


Achieving ASIC Timing Closure With Speedcore eFPGAs


Achronix's Speedcore eFPGA IP allows companies to embed a programmable logic fabric in their ASICs, delivering to end users the capability to modify or upgrade the functionality of an ASIC after being deployed in the field. This flexibility dramatically expands the solution space that can be served by the ASIC as it can be updated to support changing standards and algorithms. Timing closure is ... » read more

The Ideal Solution For AI Applications — Speedcore eFPGAs


AI requires a careful balance of datapath performance, memory latency, and throughput that requires an approach based on pulling as much of the functionality as possible into an ASIC or SoC. But that single-chip device needs plasticity to be able to handle the changes in structure that are inevitable in machine-learning projects. Adding eFPGA technology provides the mixture of flexibility and s... » read more

2018 Ushers In A Renewed Push To The Edge


The past decade has seen massive growth in centralized computing, with data processing flowing to the cloud to take advantage of low-cost dedicated data centers. It was a trend that seemed at odds with the general trend in computing — a trend that started with the mainframe but moved progressively towards ambient intelligence and the internet of things (IoT). As we move into 2018, this centra... » read more

eFPGA Acceleration in SoCs


The Speedcore design and integration methodology has been defined with intimate awareness of the difficulties ASIC engineering teams must contend with. All the necessary files and flows for capturing the functional, timing and power characteristics of a user-defined and programmed Speedcore instance, along with support for successfully reconfiguring an already field-deployed Speedcore IP embedd... » read more

Evaluating Speedcore IP For Your ASIC


By exploiting Achronix Speedcore embedded FPGA (eFPGA) IP — IP proven in multiple ASIC designs for wireless, datacenter and high-performance computing (HPC) applications — designers of SoCs can now add logic programmability to their solution, resulting in a single ASIC that can adapt to many applications. While many system architects may already have strong ideas on how an eFPGA core could ... » read more

Embedded FPGA Acceleration In SoCs


The Speedcore design and integration methodology has been defined with intimate awareness of the difficulties ASIC engineering teams must contend with. All the necessary files and flows for capturing the functional, timing and power characteristics of a user-defined and programmed Speedcore instance, along with support for successfully reconfiguring an already field-deployed Speedcore IP embedd... » read more

Embedded FPGA — A New System-Level Programming Paradigm


The current public debate on the future of the semiconductor industry has turned to discussions about a growing selection of technologies that, rather than obsessing on further process geometry shrinks, focuses instead on new system architectures and better use of available silicon through new concepts in circuit, device, and packaging design. Embedded FPGA is the latest offering that promises ... » read more

Using FPGAs To Accelerate Data Centers


With the technology industry at a crossroads — the effective repeal of Mooreʹs Law and the stagnation and decline of PC, tablet, consumer electronics and smartphone markets — data centers have become the sweet spot of the technology sector, showing healthy revenue growth and attracting new system solutions in both hardware and software. Unlike the ethereal promise of upcoming wonders from ... » read more