Author's Latest Posts

Dynamic Fault Injection Into Digital Twins Of Safety-Critical Systems
By Fraunhofer IIS/EAS - 07 Jul, 2021 - Comments: 0

In this work we present a technology for dynamically introducing fault structures into digital twins without the need to change the virtual prototype model. The injection is done at the beginning of a simulation by dynamically rewiring the involved netlists. During the simulation on a real-time platform, faults can be activated or deactivated triggered by sequences, statistical effects or by ev... » read more

Failure Mechanism Detection Algorithm With MOSFET Body Diode
By Fraunhofer IIS/EAS - 09 Jun, 2021 - Comments: 0

Autonomous driving is playing a big role in the automotive industry and defines the future of mobility on a big scale. However, autonomous driving faces several challenges, such as the performance of artificial intelligence and hardware reliability. To ensure safe functionality, the reliability of the electronic components plays an essential role and must be taken into consideration. One aspect... » read more

AnastASICA — Towards Structured and Automated Analog/Mixed-Signal IC Design For Automotive Electronics
By Fraunhofer IIS/EAS - 12 May, 2021 - Comments: 0

In our world based on electronics, the design of analog/mixed-signal (AMS) ICs is still mainly done manually. While digital design benefits from complete synthesis flows, analog lags far behind in terms of development time, cost, and risk. Analog design flows are hardly standardized and necessitate the four eye principle as important quality tool. Thus, highly experienced designers who incorpor... » read more

Automated Traceability Of Requirements In The Design And Verification Process Of Safety-Critical Mixed-Signal Systems
By Fraunhofer IIS/EAS - 07 Apr, 2021 - Comments: 0

System-level design and verification of safety-critical hardware requires a consistent methodology which complies with industrial safety-standards, for example ISO 26262 for automotive applications. For certification of safety-critical systems, the development process has to implement and enforce a strict traceability of requirements, linking the requirement specification, the design implementa... » read more

Artificial Intelligence For Sustainable And Energy Efficient Buildings
By Fraunhofer IIS/EAS - 11 Nov, 2020 - Comments: 0

According to the goals of Europe’s green deal missions, the continent strives for becoming carbon neutral by 2050. Since buildings are a major contributor to the overall consumption of energy, improving their energy efficiency can be a key to a more sustainable and greener Europe. On the way towards zero-emission buildings, several challenges have to be met: In modern energy systems, several ... » read more

13-Gb/s Transmitter For Bunch Of Wires Chip-To-Chip Interface Standard
By Fraunhofer IIS/EAS - 14 Oct, 2020 - Comments: 0

Continuous downscaling of integrated circuits has reached a bottleneck. Technologies such as system in a package, multi-chip module and integration of chips on an active or passive interposer can further improve the system performance. Bunch of wires interface standard was recently introduced for chip to chip short interfaces within a package. This standard required both terminated and untermin... » read more

A Summary Of Piezoelectric Energy Harvesting For Autonomous Smart Structures
By Fraunhofer IIS/EAS - 09 Sep, 2020 - Comments: 0

The technology of energy harvesting has great potential to enable energy autonomy of wireless sensors. The drop of power requirements of micro-electronic devices allows confidence that piezoelectric energy harvesting (PEH) is able to reliably power a wireless sensor network (WSN). The present work summarizes results of ongoing research in the field of PEH. With the aid of a performance metric a... » read more

A 10.5 μW Programmable SAR ADC Frontend With SC Preamplifier For Low-Power IoT Sensor Nodes
By Fraunhofer IIS/EAS - 12 Aug, 2020 - Comments: 0

Massive deployment of wireless autonomous sensor nodes requires their lifetime extension and cost reduction. The analog frontend (AFE) plays a key role in this context. This paper presents a successive approximation register analog-to-digital converter (SAR ADC) with a switched-capacitor programmable gain switched preamplifier (SC PGSA), as a basic component of an integrated ultra-low power AFE... » read more

Design Of An Ultra-Low-Power Current Steering DAC In A Modern SOI technology
By Fraunhofer IIS/EAS - 13 May, 2020 - Comments: 0

Despite the tremendous advancement in innovations on digitizing and processing signals over the last century, real world signals are inevitably analog in nature. A digital-to-analog converter (DAC) serves in translating these digitized signals into different analog quantities like voltage, current or charges. We mainly focus on a Nyquist-rate current-steering digital- to-analog converte... » read more

From Constraints to Tape-Out: Towards a Continuous AMS Design Flow
By Fraunhofer IIS/EAS - 10 Oct, 2019 - Comments: 0

Author(s): Krinke, Andreas; Horst, Tilman; Gläser, Georg; Grabmann, Martin; Markus, Tobias; Prautsch, Benjamin; Hatnik, Uwe; Lienig, Jens The effort in designing analog/mixed-signal (AMS) integrated circuits is characterized by the largely manual work involved in the design of analog cells and their integration into the overall circuit. This inequality in effort between analog and digital... » read more

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