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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Blog Review: November 1
By Jesse Allen - 01 Nov, 2023 - Comments: 0

Cadence’s Rich Chang finds that although UVM has being used for testbench creation for more than a decade, it is still challenging to debug problems that are inside of UVM testbench. Siemens’ Keith Felton suggests that early analysis in complex advanced packaging flows can enable designers to spot potential issues early to avoid built-in constructs that cause design failures and require ... » read more

Blog Review: October 25
By Jesse Allen - 25 Oct, 2023 - Comments: 0

Synopsys’ Graham Allan looks at enhancements in the LPDDR5X standard, such as a speed increase from 6.4Gbps to 8.5Gbps using the same 1.1V core voltage as LPDDR5 alongside better signal integrity, reliability, and battery efficiency. Cadence’s Krunal Patel examines the essential components and operation of MACsec, a security protocol to ensure the confidentiality and integrity of data tr... » read more

Research Bits: October 24
By Jesse Allen - 24 Oct, 2023 - Comments: 0

Photonic-electronic hardware processes 3D data Researchers from the University of Oxford, University of Muenster, University of Heidelberg, and University of Exeter are developing integrated photonic-electronic hardware capable of processing three-dimensional data, which the team claims boosts data processing parallelism for AI tasks. The researchers added an extra parallel dimension to the... » read more

Blog Review: October 18
By Jesse Allen - 18 Oct, 2023 - Comments: 0

Siemens' Stephen Chavez suggests including analog mixed signal analysis and board level parasitics within the design process from the earliest electrical design stage and throughout final release of the PCB design. Synopsys’ Filip Thoen, Leonard Drucker, and Vivek Prasad highlight how the complexities and interdependencies of multi-die systems create new challenges for software bring-up, a... » read more

Research Bits: October 17
By Jesse Allen - 17 Oct, 2023 - Comments: 0

High-entropy multielement ink semiconductors Researchers from Lawrence Berkeley National Laboratory and UC Berkeley developed a high-entropy semiconducting material called ‘multielement ink’ that can be processed at low-temperature or room temperature. “The traditional way of making semiconductor devices is energy-intensive and one of the major sources of carbon emissions,” said Pei... » read more

Blog Review: October 11
By Jesse Allen - 11 Oct, 2023 - Comments: 0

Cadence's Sangeeta Soni examines Integrity and Data Encryption (IDE) verification considerations for Compute Express Link (CXL) devices, including MAC generation and handling, key programming and exchange, and early MAC termination. Synopsys' Madhumita Sanyal points to how the increased bandwidth of PCIe 6.0 supports the demanding requirements of AI accelerators. Siemens' Kevin Webb expla... » read more

Startup Funding: September 2023
By Jesse Allen - 09 Oct, 2023 - Comments: 0

Chip-to-chip and data center I/O drew investor interest in September, including support for several startups developing Compute Express Link (CXL) solutions. Elsewhere in the data center, several large rounds went to companies developing AI accelerators. And at the edge, startups are building unique ways to handle AI at very little power by initially processing data directly at the sensor. O... » read more

Blog Review: October 4
By Jesse Allen - 04 Oct, 2023 - Comments: 0

Cadence's Felipe Goncalves checks out the Integrity and Data Encryption (IDE) feature in PCIe 6.0, a new layer inserted between the transection layer and data link layer with the goal of protecting against threats from physical attacks on the link. Siemens' Robin Bornoff, Daniel Berger, and Kai Liu explore the potential for large language models (LLMs) make the use of CAE tools simpler, more... » read more

Research Bits: October 3
By Jesse Allen - 03 Oct, 2023 - Comments: 0

Growing indium selenide at scale Researchers from the University of Pennsylvania, Brookhaven National Laboratory, and the Air Force Research Laboratory grew the 2D semiconductor indium selenide (InSe) on a full-size, industrial-scale wafer. It can also be deposited at temperatures low enough to integrate with a silicon chip. The team noted that producing large enough films of InSe has prove... » read more

Blog Review: September 27
By Jesse Allen - 27 Sep, 2023 - Comments: 0

Siemens' Dirk Hartmann examines how a continual improvement in predictive capability processing and algorithms enables the evolution of simulation performance and highlights two areas that underpin most simulation tools. Synopsys' Ian Land, Jason Niatas, and Marc Serughetti note that digital twins can be used from the chip level through sub-systems and up to the system level to examine perfo... » read more

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