Blog Review: Apr. 3

HBM integration; USB4 v2; race car aerodynamics; generative AI testing.


Siemens’ Keith Felton finds that high bandwidth memory integration poses significant challenges for package designers stemming from its unique architecture and stringent performance requirements.

Synopsys’ Gervais Fong finds out what’s new in the USB4 v2 specification, some of its unique challenges involved in doubling the performance capabilities of the USB wired connection, and an intriguing potential use case with local AI accelerators.

Cadence’s Veena Parthan points to some of the key race car components used to generate downforce and increase aerodynamic performance and finds them moving to consumer vehicles.

Keysight’s Jonathon Wright finds five areas where generative AI and LLMs are changing the work of testers and tips on how to understand and harness what they have to offer.

Ansys’ Christophe Bianchi checks out how STMicroelectronics utilizes thermomechanical simulation to evaluate the behavior and integrity of silicon carbide power module designs under different environmental conditions and identify potential premature failures.

Arm’s Diego Russo provides an overview of Python on Arm platforms, benchmarking efforts, and support for Windows on Arm and machine learning libraries.

In a blog for SEMI, ASM’s John Golightly highlights efforts to reduce greenhouse gas emissions across the global semiconductor value chain, including the importance of reporting emissions data to pinpoint priority areas to address.

Plus, check out the blogs featured in the latest Systems & Design newsletter:

Technology Editor Brian Bailey wonders if careers are like adjectives and have to move along a certain path.

Arteris’s Frank Schirrmeister shows that the growing number of chips in vehicles puts a spotlight on data transport architectures.

Movellus’ Barry Pangrle explains why real-time values are essential for identifying future variations in voltage and temperature.

Synopsys’ Rimpy Chugh advises how to avoid surprises in layout-level or signoff static timing analysis with automated constraint management.

Siemens’ David Abercrombie advocates for addressing the verification challenges posed by concurrent design processes earlier in the design flow.

Keysight’s Bernard Ang presents how data acquisition software enables efficient testing in the lab, on the production floor, and out in the field.

Cadence’s Steve Brown looks at a chiplet reference design built specifically for ADAS.

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