Author's Latest Posts


Blog Review: July 30


Siemens' John McMillan compares 2.5D and 3D-IC technologies and why choosing between them depends on the specific requirements of a product, such as power consumption, thermal constraints, form factor limitations, data bandwidth, and performance-per-watt targets. Cadence's Yeshavanth BN checks out changes in MIPI MPHY 6.0 that increase the data rate and improve the performance of next-genera... » read more

Research Bits: July 29


Sort-in-memory Researchers from Peking University and the Chinese Institute for Brain Research developed a sort-in-memory hardware system based on memristors that is tailored for complex, nonlinear sorting tasks. The comparator-free processing-in-memory architecture is built on a one-transistor–one-resistor (1T1R) memristor array, using a Digit Read mechanism that replaces traditional com... » read more

Blog Review: July 23


Synopsys' Vincent van der Leest and Mike Borza argue that hardware security is critical for providing the foundational trust, physical protection, and performance enhancements necessary to support software security and prevent leaks of sensitive data and cryptographic keys. Siemens' Shetha Nolke explains why stress matters so much in 3D-ICs and why evaluating it isn't as straightforward as i... » read more

Research Bits: July 22


Getting the gold Researchers from Flinders University proposed a new extraction technique for recovering gold from electronic waste and ore that avoids the use of mercury and cyanide, which are often used in small-scale gold recycling and mining operations. “The study featured many innovations including a new and recyclable leaching reagent derived from a compound used to disinfect water,... » read more

Blog Review: July 16


Synopsys' Bradley Geden and Manoz Palaparthi explain the difference between functional signoff and RTL signoff and why increased SoC complexity means that verification flows must now capture both the intent and the integrity of a design before it can move forward. Cadence's Frank Ferro finds that LPDDR isn't just for mobile devices anymore, with the new LPDDR6 standard bringing increased ban... » read more

Startup Funding: Q2 2025


Investors were drawn to a wide range of innovative approaches in Q2 2025, backing startups developing superconducting logic, chips for an emerging number format, big data processors, and novel power semi architectures. At the same time, photonics continues to draw investment dollars due to its ability to move data faster and with less energy at both the chip-to-chip and data center levels. T... » read more

EDA Startups At DAC 2025


The 62nd DAC showcased numerous new exhibitors in 2025, including tool and IP providers, design services firms, and component marketplaces. New EDA startups, in particular, had a robust showing, with entrepreneurial engineers seeking to tackle the increasingly complex challenges facing modern chip design with fresh approaches. AI was a strong theme throughout the show, with companies of all ... » read more

Research Bits: July 7


3D NAND PUF Researchers from Seoul National University developed a new hardware security technology based on commercially available 3D NAND flash memory. The approach is an adaptation of physical unclonable functions (PUFs) with the ability to hide a security key under user data when not in use and reveal it only when needed. The same memory space used for storing security keys can be repurpos... » read more

Blog Review: July 2


Synopsys’ Shankar Krishnamoorthy chats with industry experts about how the combination of AI and software-defined systems is driving a re-evaluation of engineering workflows and why chip, software, and system development must evolve in unison. Siemens’ Jake Wiltgen considers the rapidly evolving and growing challenge of performing DFT verification as designs scale, with complex hierarchi... » read more

Research Bits: July 1


Copper-to-copper bonding for GaN integration Researchers from MIT, Georgia Tech, and Air Force Research Laboratory propose a bonding process to integrate gallium nitride (GaN) transistors onto standard silicon CMOS chips. They used the process to create a power amplifier. “We wanted to combine the functionality of GaN with the power of digital chips made of silicon, but without having to ... » read more

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