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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Blog Review: June 27
By Jesse Allen - 27 Jun, 2018 - Comments: 0

Applied Materials' Sundeep Bajikar argues that to realize the full potential of AI, new computing architectures are necessary, otherwise AI will quickly become unaffordable. Synopsys' Iain Singleton considers why it may not always be necessary to start at the reset state during formal verification and how to use abstractions to get a head start on bug hunting. Cadence's Meera Collier look... » read more

Power/Performance Bits: June 26
By Jesse Allen - 26 Jun, 2018 - Comments: 0

Organic pigment for optoelectronics Researchers at Oregon State University are investigating xylindein, an organic pigment produced by fungi, to find low-cost, sustainable alternatives to silicon in electronic or optoelectronic applications where the high-performance capabilities of silicon aren't required. Xylindien is secreted by two wood-eating fungi in the Chlorociboria genus. Any wood ... » read more

The Week In Review: Design
By Jesse Allen - 22 Jun, 2018 - Comments: 0

Tools Synopsys revealed a power analysis solution for early SoC design as well as signoff-accurate power and reliability closure. PrimePower has reliability as a major focus, expanding power and reliability signoff and ECO closure capabilities from physical awareness to cell electromigration effects. Supported power types include peak power, average power, clock network power, leakage power, a... » read more

Blog Review: June 20
By Jesse Allen - 20 Jun, 2018 - Comments: 0

Mentor's Randy Allen digs into OpenACC, a collection of directives and routines to help a compiler uncover and schedule parallelism, plus an examination of the GCC implementation's performance. Cadence's Paul McLellan takes a look at the shifting opinions on FD-SOI vs. finFET as Dan Hutcheson of VLSI Research finds most see the two as complementary technologies in his latest survey. Synop... » read more

Power/Performance Bits: June 19
By Jesse Allen - 19 Jun, 2018 - Comments: 0

Tandem solar reaches 25.2% efficiency In the push for ever-more efficient solar panels, researchers are turning to tandem, or double-junction, photovoltaics. Tandem solar panels use two different types of solar cell capable of absorbing different wavelengths of light stacked on top of each other to maximize the conversion of light rays into electrical power. Recently, two groups have reache... » read more

The Week In Review: Design
By Jesse Allen - 15 Jun, 2018 - Comments: 0

M&A MIPS has reportedly been acquired again, this time by AI startup Wave Computing. Wave focuses on data center-based neural network training using its parallel dataflow processing architecture. In March, the company signed on to use 64-bit multi-threaded processor cores from MIPS in future projects. Previously, MIPS was owned by Tallwood Venture Capital, which acquired MIPS from Imaginat... » read more

Blog Review: June 13
By Jesse Allen - 13 Jun, 2018 - Comments: 0

Synopsys' Taylor Armerding looks at what the flaws in OpenPGP and S/MIME encryption means for the IoT and warns that the problems of patching such devices could lead to an increasing chance of security failures. Cadence's Paul McLellan takes a peek at Imec's roadmap to see what the path to 3nm looks like, how nanosheets fit in, and why design and system technology co-optimization is necessar... » read more

Power/Performance Bits: June 12
By Jesse Allen - 12 Jun, 2018 - Comments: 0

AI for solar materials In the search for better organic photovoltaic materials, researchers at Osaka University turned to machine learning to help identify candidates. While organic photovoltaics (OPVs) are promising on a cost basis, they do not yet have the required power conversion efficiency (PCE) necessary for commercialization. A key element in this is the semiconducting polymer layer. ... » read more

The Week In Review: Design
By Jesse Allen - 08 Jun, 2018 - Comments: 0

Tools & IP Synopsys added machine learning capabilities to its Design Platform. The company highlighted benefits to the PrimeTime signoff tool, which saw 5X faster power recovery in customer designs at leading-edge geometries. Renesas is using the tool, noting a 4X power ECO speed-up. ArterisIP unveiled a standalone last level cache (LLC) for high-performance SoCs. CodaCache can be adde... » read more

Blog Review: June 6
By Jesse Allen - 06 Jun, 2018 - Comments: 0

In a video, Cadence's Marc Greenberg discusses the advantages and trade-offs of HBM2 and GDDR6, two advanced memory interfaces targeted to the high-performance computing market. Synopsys' Ravindra Aneja takes a look at what's needed for AI-focused hardware designs and how formal can help with the necessary data path verification. In a video, Mentor's Colin Walls explains the challenges of... » read more

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