Blog Review: June 20

FD-SOI vs. finFET; OpenACC; materials and scaling; metrology at 3nm.

popularity

Mentor’s Randy Allen digs into OpenACC, a collection of directives and routines to help a compiler uncover and schedule parallelism, plus an examination of the GCC implementation’s performance.

Cadence’s Paul McLellan takes a look at the shifting opinions on FD-SOI vs. finFET as Dan Hutcheson of VLSI Research finds most see the two as complementary technologies in his latest survey.

Synopsys’ Eric Huang considers how the automotive industry will keep up with rapidly-improving embedded vision technology, and whether we’ll end up upgrading a chip every few years to take advantage of improved object recognition.

Applied Materials’ Jonathan Bakke argues that to continue scaling, new materials engineered at the atomic scale are necessary, particularly in the contact and local interconnects.

SEMI’s Debra Vogler chats with Priya Mukundhan of Rudolph Technologies about the key challenges in providing the necessary metrology and inspection solutions at 5nm and 3nm.

Arm’s Charlotte Christopherson shares a talk by Alasdair Russell of Cancer Research UK on why genome editing has proven to be a significant disruptor for clinical research and what lies ahead for CRISPR, from last year’s Arm Research Summit.

UltraSoC’s Aileen Smith argues that to guarantee the safety of systems, security and system monitoring need to come first.

Lam Research’s Kris Kendall traces how the electronics cost component of automobiles has doubled in the past decade as more connectivity and assistance features become an expected part of new cars.

Rambus’ Aharon Etengoff argues that even if stores get rid of their cashiers with mobile and self-scanning checkout, having human staff on hand to guide a shopper’s experience is a vital component of brick-and-mortar stores.

Plus, don’t miss the featured blogs from last week’s Low Power-High Performance newsletter:

Editor In Chief Ed Sperling takes a peek inside the world’s fastest computer and explains why supercomputing now matters to many more people.

Helic’s Magdy Abadir finds disagreement about the impact of crosstalk on today’s large mixed-signal designs.

ANSYS’ Annapoorna Krishnaswamy points to the need for new methodologies to deal with increased variability at advanced nodes.

Fraunhofer’s Stephan Gerth looks at why it’s important to incorporate reliability information into the concept phase.

Moortec’s Ramsay Allen examines the impact of designing for worst-case process variation and why it can erode the gains made by migrating to an advanced node.

Rambus’ Mondeep Thiara shows why reducing SerDes latency variation and jitter is necessary for long-reach networking applications.

Arm’s Paul Williamson zeroes in on the hardware, software and security choices available to IoT developers.

Mentor’s Awashesh Kumar and Madhur Bhargava share three steps to take when verifying the complex interactions between power elements at a high abstraction level.

Synopsys’ John Swanson examines the standard that enables predictable latency and guaranteed bandwidth for automotive networks.

Cadence’s Vinay Patwardhan notes that new AI chips require an extreme level of architectural complexity, making routing a challenge.

Arm’s Ciarán Dunne explains how to keep time-to-market and cost pressures under control, particularly for IoT designs.



Leave a Reply