Author's Latest Posts


ReRAMs Look To Silicon For Silicon Compatibility


For such a critical material, silicon oxide is not especially well understood. The semiconductor industry certainly understands how to grow high quality oxides with high breakdown voltages, but what happens in less ideal situations? What does the introduction of microstructure do? If there are regions that are oxygen-rich or silicon-rich relative to the stoichiometric SiO2 composition, how do t... » read more

Assist Layers: The Unsung Heroes of EUV Lithography


Most discussions of advanced lithography focus on three elements — the exposure system, photomasks, and photoresists — but that's only part of the challenge. Successfully transferring a pattern from the photomask to a physical structure on the wafer also depends on a variety of films working together, including the underlayers, the developers, and a variety of surface treatments. In fact... » read more

Big Shifts At Very Small Geometries


The number of changes across the semiconductor industry are accelerating and widening. There are more innovations, in more places, and in more applications. What follows is a small peek at just how many significant changes are afoot, where they are happening, and who's getting recognized for their efforts. Quantum computing, but hold the math The modern electronics industry rests on multip... » read more

New Challenges Emerge With High-NA EUV


High numerical aperture EUV exposure systems are coming — as soon as 2025 by some estimates. Though certainly a less profound change than the introduction of extreme ultraviolet lithography, high-NA lithography still brings a new set of challenges for photoresists and related materials. With a higher numerical aperture, photons strike the wafer at a shallower angle. That requires thinner p... » read more

Looking Forward To SPIE, And Beyond


On the eve of this year’s SPIE Advanced Lithography + Patterning conference, I took a look at the IEEE Devices and Systems Roadmap’s lithography section. It’s especially notable for the emergence of EUV lithography, which has quickly become critical for advanced logic. High-NA tools to support still smaller dimensions are on the horizon. In the near-term, though, the key challenge is not ... » read more

2D Semiconductor Materials Creep Toward Manufacturing


As transistors scale down, they need thinner channels to achieve adequate channel control. In silicon, though, surface roughness scattering degrades mobility, limiting the ultimate channel thickness to about 3nm. Two-dimensional transition metal dichalcogenides (TMDs), such as MoS2 and WSe2, are attractive in part because they avoid this limitation. With no out-of-plane dangling bonds and at... » read more

The Physics Of Ferroelectrics


The physics of ferroelectric materials is a large topic — too large for comprehensive coverage in a single article. While researching my recent article on negative capacitance, I found a number of papers that might be of interest to readers seeking more depth. Researchers in Japan used ferroelectric BiFeO3 to control the behavior of CaMnO3, a Mott insulator. Changing the polarization of th... » read more

Ferroelectric Memories: The Middle Ground


The first article in this series considered the use of ferroelectrics to improve subthreshold swing behavior in logic transistors. The prospects for ferroelectrics in logic applications are uncertain, but ferroelectric memories have clear advantages. The two most common commercial memories lie at opposite ends of a spectrum. DRAM is fast, but requires constant power to maintain its informat... » read more

Ferroelectrics: The Dream Of Negative Capacitance


Ferroelectrics are getting a serious re-examination, as chipmakers look for new options to maintain drive current. Ferroelectric materials can provide non-volatile memory, serving an important functional gap somewhere between DRAM and flash memory. Indeed, ferroelectrics for memory and 2D channels for transistors were two highlights of the recent IEEE Electron Device Meeting. Ferroelectri... » read more

What’s Different About Next-Gen Transistors


After nearly a decade and five major nodes, along with a slew of half-nodes, the semiconductor manufacturing industry will begin transitioning from finFETs to gate-all-around stacked nanosheet transistor architectures at the 3nm technology node. Relative to finFETs, nanosheet transistors deliver more drive current by increasing channel widths in the same circuit footprint. The gate-all-aroun... » read more

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