Author's Latest Posts

Over 50% Of Smart Phones And Tablets Leverage SOI
By Various Writers - 18 Mar, 2013 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ In a recent press release, the SOI wafer leader Soitec said that chips built on its SOI wafers were found in over half of the smartphones and tablets in the market worldwide. 50%? That’s a lot! How do they figure that? The answer: RF. [caption id="attachment_809" align="alignleft" width="549" caption="As seen here... » read more

Designing with FinFETs: The Opportunities and the Challenges
By Various Writers - 28 Feb, 2013 - Comments: 0

With the help of double-patterning and other advanced lithography techniques, CMOS technology continues to scale to 20-nanometer (nm) and beyond. Yet, because of their superior attributes, FinFETs are replacing planar CMOS technology as the device technology of choice at these advanced nodes. In particular, FinFETs demonstrate better results in the areas of performance, leakage and dynamic powe... » read more

Blocking Vs. Non-Blocking
By Various Writers - 28 Feb, 2013 - Comments: 0

By analyzing two flow control protocols – Single Threaded Tag (STT) and Multi-Threaded Non-Blocking – we describe a typical SoC employing the two protocols and evaluate their relative advantages and disadvantages. We evaluate the two protocols by experimentation with a representative digital TV (DTV) design and its derivatives, and then show you how one system is able to achieve better perf... » read more

Clock And Reset Ubiquity: A CDC Verification Perspective
By Various Writers - 28 Feb, 2013 - Comments: 0

Today’s SoC integrates a collection of peripherals, memory, graphics, networking and I/O components that originate from a multitude of sources. It could comprise designs from within the company, from other companies or from third-party IP vendors. These independently developed components come together to enable a rich feature set for the SoC. However, accompanying this abundance of features i... » read more

Chip Economics
By Various Writers - 28 Feb, 2013 - Comments: 0

The concise research paper, "NoC Interconnect Improves SoC Economics: Initial Investment is Low Compared to SoC Performance and Cost Benefits," by Objective Analysis Semiconductor Market Research, provides quantitative data from user experiences comparing the costs and benefits of implementing network on chip SoC interconnects versus traditional bus and crossbar interconnects. You will learn... » read more

Ready For 3D-IC
By Various Writers - 28 Feb, 2013 - Comments: 0

This technical presentation describes the challenges and Mentor's solutions for verifying and testing IC designs targeted for 3D packages, such as stacked die using TSVs or multi-die packages using silicon interposers. To download this white paper, click here. » read more

A Call To Action: How 20nm Will Change IC Design
By Various Writers - 21 Feb, 2013 - Comments: 0

The 20nm process node represents a turning point for the electronics industry. While it brings tremendous power, performance and area advantages, it also comes with new challenges in such areas as lithography, variability, and complexity. The good news is that these become manageable challenges with 20nm-aware EDA tools when they are used within end-to-end, integrated design flows based on a �... » read more

Optimizing Test To Enable Diagnosis-Driven Yield Analysis
By Various Writers - 21 Feb, 2013 - Comments: 0

Using diagnosis-driven yield analysis, companies have decreased their time to yield, managed manufacturing excursions and recovered yield caused by systematic defects. Dramatic time savings and yield gains have been proven using these methods. Companies must plan ahead to take advantage of diagnosis-driven yield analysis. The planning needs to include how and what patterns to generate during AT... » read more

SOI Highlights at Common Platform Tech Forum
By Various Writers - 19 Feb, 2013 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ The 2013 Common Platform Technology Forum showcased “the latest technological advances being delivered to the world’s leading electronics companies,” so of course SOI-based topics were well-represented. Happily, those of us who weren’t able to get over to Silicon Valley were able to attend “virtually” via a ... » read more

SoC Derivatives Made Easy
By Various Writers - 14 Feb, 2013 - Comments: 0

Today’s system-on-a-chip (SoC) designs are creating more challenges than ever – challenges that demand bringing the product to market faster, before the competition does. The electronics industry and growing competition require that SoC’s achieve a short time to market (TTM) while design complexity continues to grow at a rapid rate. Another challenge is to keep the SoC design and overall ... » read more

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