Author's Latest Posts


Intra-Field Stress Impact on Global Wafer Deformation


One of the contributors to layer-to-layer overlay in today’s chip manufacturing process is wafer distortion due to thin film deposition. Mismatch in the film specific material parameters (e.g., thermal expansion coefficients) may result in process-induced warpage of the wafers at room temperature. When these warped wafers are loaded onto the scanner for the next layer exposure, in-plane disto... » read more

Improvement Of Dopant Concentration Control With Acoustic Control System For B-SiGe Epitaxy Deposition


Currently, SiGe-B epitaxy is a leading technology to induce strain in PMOS channel and improve the hole mobility to achieve better device performance. In practice, we observe that the device performance strongly depends on the dopant concentration, especially boron concentration. It is shown that the Acoustic Control System [ACS] is able to actively respond to instantaneous variations of incomi... » read more

One Micron Damascene Redistribution for Fan-Out Wafer Level Packaging Using a Photosensitive Dielectric Material


Authors: Warren W. Flack, Robert Hsieh, Ha-Ai Nguyen Ultratech, a division of Veeco 3050 Zanker Road, San Jose, CA 95134 USA [email protected] John Slabbekoorn, Samuel Suhard, Andy Miller IMEC Kapeldreef 75 B-3001 Leuven, Belgium [email protected] Akito Hiro, Romain Ridremont JSR MICRO NV Technologielaan 8 B-3001 Leuven, Belgium [email protected] Abstract This... » read more

Lithography Challenges For Leading Edge 3D Packaging Applications


Leading edge consumer electronic products drive demand for enhanced performance and small form factors. This in turn drives manufacturing requirements for all aspects of semiconductor device fabrication. As the cost of front end device manufacturing continues to escalate rapidly with each new technology node, semiconductor manufacturing companies are now also focusing on packaging technology to... » read more

Low Ripple Notch Filter Designs Using Apodized Thickness Modulation


An apodized discrete layer thickness design method for notch filters is presented. The method produces error tolerant designs with low ripple in the pass band regions without any additional numerical optimization. Sample designs are presented. Multiple approaches have been used in the past for producing notch filters (also called minus filters). The two main approaches can be grouped into ru... » read more

Ion Beam Sputtering Deposition of Fluoride Thin Films


By Aiko Ode, Veeco Instruments Thin film coatings for deep UV wavelengths are predominately produced by evaporation methods (thermal and Ebeam). Factors limiting the performance of evaporated films include surface roughness, porosity, absorption, and defect density. To enhance the films, they are typically deposited at high substrate temperatures (above 300°C.) The thermal stress created u... » read more

Vapor-Deposited Octadecanethiol Masking Layer on Copper for Selective Hf3N4 ALD


Full title: Vapor-deposited octadecanethiol masking layer on copper to enable area selective Hf3N4 atomic layer deposition on dielectrics studied by in situ spectroscopic ellipsometry Journal of Vacuum Science & Technology A 36, 031605 (2018); Authors: Laurent Lecordiera, Veeco Instruments Sebastiaan Herregods and Silvia Armini, IMEC Area-selective atomic layer deposition (AS-ALD) h... » read more

Cost Analysis of a Wet Etch TSV Reveal Process


Through silicon via (TSV) technology is a key design element being incorporated into more and more advanced packaging designs today. TSVs offer distinct benefits in form factor and improved performance and can enable new, innovative designs not previously possible. To scale this valuable technology and spark industry adoption, there is a need to refine and optimize the TSV reveal process to red... » read more