Things to watch out for in tuning circuits for specific applications.
Using a device’s body bias effect allows designers to tune a circuit’s behavior to meet both power and performance specifications, but getting it right isn’t always easy. Accurate, fast, automated body bias verification is critical to ensure today’s complex designs meet demanding performance, reliability, and power usage specifications.
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Gate-all-around FETs will replace finFETs, but the transition will be costly and difficult.
The backbone of computing architecture for 75 years is being supplanted by more efficient, less general compute architectures.
The semiconductor industry will look and behave differently this year, and not just because of the pandemic.
SRC’s new CEO sheds some light on next-gen projects involving everything from chiplets to hyperdimensional computing and mixed reality.
More than $1.5B in funding for 26 startups; December was a big month for AI hardware.
New data suggests that more chips are being forced to respin due to analog issues.
The backbone of computing architecture for 75 years is being supplanted by more efficient, less general compute architectures.
The number of options is increasing, but tooling and methodologies haven’t caught up.
Big investment in EV, batteries, and data center chips as 26 companies raise $2.6B.
Interconnects are becoming the limiter at advanced nodes.
Chips are hitting technical and economic obstacles, but that is barely slowing the rate of advancement in design size and complexity.
As implementations evolve to stay relevant, a new technology threatens to overtake SerDes.
Predicting the power or energy required to run an AI/ML algorithm is a complex task that requires accurate power models, none of which exist today.
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