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Blog Review: April 15

Verification methodologies; 5G security; hyperscale connectivity; Covid-19 impact.

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Mentor’s Neil Johnson argues that it’s time to reevaluate the current definition of verification methodology, with a new focus on methodologies driven by the needs of the design and best suited to different abstractions.

Synopsys’ Derek Handova warns that the need to manage the security risks of billions of IoT devices will continue to change the requirements and scope of 5G security.

Cadence’s Paul McLellan notes that hyperscale data centers are about more than the processor and looks at the two key types of communication going on.

A Rambus writer takes a look at what could happen to encryption with the rise of quantum computing and why cryptographers are looking towards completely new approaches.

Arm’s Chris Adeniyi-Jones digs into a way to reduce the complexity of a networking setup for when various IoT endpoints are connected to an Edge Gateway by using a new Container Network Interface.

Ansys’ Jeff Tharp takes a look at modeling integrated photonics and the company’s recent acquisition of Lumerical.

SEMI’s Michael Hall takes a look at how the semiconductor supply chain in Asia is dealing with challenges caused by Covid-19 as manufacturing workers in China prepare to return to production likes.

In a video, VLSI Research’s Risto Puhakka and Dan Hutcheson discuss what’s happening in the semi supply chain, how the IC market’s recovery from 2019 is progressing, and CapEx plans.

NXP’s Andrew Turley contends that the FCC should keep the 5.9 GHz band reserved for transportation and vehicle applications rather than turning it over to unlicensed WiFi devices.

For more good reading, check out the latest Low Power-High Performance newsletter:

Editor In Chief Ed Sperling examines what we really know about the cloud and how we learned about it.

Mentor’s Progyna Khondkar digs into soft macro power management challenges and the importance of properly protecting boundaries.

Fraunhofer IIS/EAS’ André Lange digs into a time-saver that still isn’t a standard step in the verification of IC designs.

Adesto’s Paul Hill and Gordon MacNee explain why embedded design means engineers of different disciplines need to work closely together during the design phase of a project to avoid bugs.

Moortec’s Stephen Crosher predicts how environmental controls will impact the cloud.

ANSYS’ Theresa Duncan and Chris South recommend using ALT to determine the reliability and robustness of electronic components.

Cadence’s Tyler Lockman illustrates how wire bond fingers have specific requirements for exposure through the solder mask layer.

Synopsys’ Rohit Narkar defines four primary use cases for different debug needs.

Arm’s Phil Burr points to new ways to license IP give development teams more choices.



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