Blog Review: April 19

Modeling battery materials; PCB collaboration; CFD mesh; optimizing the metal gate recess.


Synopsys’ Soren Smidstrup and Kerim Genc explore how materials modeling helps battery designers explore the wide playing field for new battery materials and optimize performance by co-designing the structure and chemistry of new batteries, ultimately shortening development time and cost.

Siemens’ Stephen Chavez finds that enabling multiple engineers to work simultaneously within the same PCB schematic, constraints, and layout improves PCB design productivity and efficiency.

Cadence’s John Chawner considers efforts to define the relative coarseness or fineness of a CFD mesh and the aims for 2023.

Coventor’s Pradeep Nanja uses virtual process modeling to investigate resistance and capacitance in finFETs under different gate critical dimensions, metal gate recess depths, and metal gate recess profiles.

Arm’s Dennis Laudick suggests four practical approaches the automotive industry can take to accelerate the development of software-defined vehicles, including expanded industry ecosystem collaboration and modern software development methodologies.

Ansys’ Arien Sligar checks out how to generate synthetic radar data for use in AI/ML training and model complex radar scenarios in real time using an electromagnetic simulation technique based on the shooting and bouncing rays (SBR) method.

Keysight’s Dylan McGrath explains RedCap, the cellular IoT specification for 5G that aims to provide connectivity to mid-tier IoT devices such as wireless sensors, healthcare monitoring wearables, and new types of surveillance equipment that lack the need for the full capabilities of 5G NR but have much more stringent cost and power consumption requirements.

SEMI’s Bettina Weiss notes that while planning for long-term supply chain resiliency has become a major focus for the electronics industry following three years of major global disruptions, the ability to quickly adjust to disruptions over a shorter term is equally important.

Plus, check out the blogs featured in the latest Low Power-High Performance newsletter:

Fraunhofer’s Andy Heinig contends that current chiplet interface standardization efforts fall short when it comes to handling analog signals and power.

Ansys’ Chris South looks at how to uncover design and construction weaknesses by applying increased stressors to force failures.

Synopsys’ Rahul Thukral and Bhavana Chaurasia explain why IoT and edge devices are shifting away from traditional memory technologies.

Quadric’s Steve Roddy warns that fixed-function accelerators embedded in silicon only stay useful if models don’t adopt new operators.

Rambus’ John Eble lays out key changes in the latest generation of memory, along with some new design challenges.

Siemens’ Vidushi Goel advises creating a common pool of resources to avoid exhaustion of individual buffer space.

Arm’s Alexandre Romana shows why virtualization is necessary to handle the rapidly increasing amount of software in vehicles.

Cadence’s David Garlisch finds converting CFD grids into a printable solid model is possible with some challenges.

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