Blog Review: Aug. 28

Making a 1.2 trillion transistor chip; HPC bottlenecks; the re-verticalization of ICs.


Cadence’s Paul McLellan takes a look at the numerous challenges in designing and manufacturing Cerebras’ massive 400,000 processor, 1.2 trillion transistor chip.

Synopsys’ Taylor Armerding points to a lack of robust mobile app security and why building in security from the beginning can lead to greater productivity and cost saving.

Mentor’s Paul Johnston takes a look at what’s in store at the upcoming Integrated Electrical and Electronic Solutions Forum and why it’s being held outside Detroit for the first time.

Rambus’ Steven Woo warns that high-performance computing memory bandwidth and capacity are continuing to fall further and further behind the performance of compute engines, making memory and I/O subsystems increasingly larger bottlenecks.

In a video, VLSI Research’s Dan Hutcheson chats with Michael Wishart, CEO of Efabless, about more cost-effective ways to bring innovative chips to market and the re-verticalization of ICs.

Arm’s Oxana Latypova takes a look at the rollout of eSIM and iSIM and what OEMs see as the obstacles to large scale commercial deployment.

Phase-change memory expert Ron Neale digs into non-volatile stacked memory selectors and why the need for Forming is the big known unknown.

ANSYS’ Shawn Wasserman checks out the different flavors of OLEDs and why they’re gaining ground as a lighting option.

SEMI’s Serena Brischetto chats with Dimitrios Damianos of Yole Développement about MEMS market dynamics, what’s fueling growth of MEMS and sensors, and future trends.

And don’t miss the blogs featured in last week’s System-Level Design newsletter:

Editor In Chief Ed Sperling explains why large chip companies are embracing third-party accelerators, and trying to steal each other’s experts.

Technology Editor Brian Bailey implores device manufacturers to be transparent with users about how secure their devices really are.

Mentor’s Wael ElManhawy and Joe Kwan examine the impact of systematic process variation on layouts for improving yield and product robustness.

Synopsys’ Sudeep Mondal and Sean O’Donohue present a coverage-driven hybrid approach of static and dynamic verification for functional CDC verification closure.

UltraSoC’s Aileen Ryan argues that it’s time for the automotive industry to come together to define security best practices.

OneSpin’s Nicolae Tusinschi digs into why successful projects entail more than core compliance to the ISA.

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