中文 English

Blog Review: Aug. 5

Countering chip tampering; adaptive neural net models; open source hardware.

popularity

Rambus’ Scott Best explains some more sophisticated chip attacks, such as side-channel attacks, clocking attacks, fault injection, and infrared emission analysis, and countermeasures that can be adopted against them.

Arm’s Mark O’Connor considers ways that deployed neural networks could adapt to examples it sees in real-world use and generate more accurate predictions.

Mentor’s Chris Spear argues for the necessity of experimentation and trial-and-error when learning SystemVerilog concepts, and suggests a few things to try out.

Cadence’s Paul McLellan takes a look at the movement for open source hardware designs and the recent collaboration between FOSSi, Skywater, Google, and Efabless on an open source 130nm PDK.

Synopsys’ Stelios Diamantidis finds there are a number of ways in which AI can help chip designers assess PPA tradeoffs during back-end physical design.

SEMI’s Dave Anderson shares highlights from Semicon West keynotes and why it’s so important for the semiconductor industry to be concerned about environmental impacts.

Ansys’ Scott Nyberg checks out some of what went into designing a fully electric racecar with Porche Motorsport.

And don’t miss the blogs featured in the latest Systems & Design newsletter:

Editor in Chief Ed Sperling observes that just because features are smaller doesn’t make them more valuable.

Technology Editor Brian Bailey observes that science and engineering form a partnership in which each discipline relies on and works with the other to get to useful products.

Cadence’s Frank Schirrmeister sees hyperscale computing and a focus on the interaction between domains pushing math-based analysis to the forefront.

OneSpin’s Saša Stamenković promotes an online, free event that will explore solutions to the challenge of integrating in-house and third-party IPs into complex SoCs.

Mentor’s Mika Castren advises how to ensure pre- and post-silicon verification complies with developing 5G standards.

Aldec’s Alex Gnusin explains how to validate design code robustness without running simulations.

Imagination’s Mike Barnes demonstrates making an automotive safety assistance feature more realistic and informative.

Synopsys’ Adam Cron and Brandon Wang look at ways to accelerate the design process at a lower cost and with less risk.



Leave a Reply


(Note: This name will be displayed publicly)