Blog Review: Jan. 3

CAE and HMI; Ethernet IPSec; emerging memories and AI; MBSE for heavy trucks.


Siemens’ Stephen Ferguson looks at the history of computer aided engineering through the lens of how humans interact with computers, with each development enabling a step change in engineering productivity, and the new era on the horizon.

Cadence’s Krunal Patel finds that the security of data transmission can be improved by integrating Ethernet with Internet Protocol Security (IPSec), which operates at the network layer of the OSI model  to encrypt data and verify the integrity of the transmitted information, preventing tampering.

Synopsys’ Jamil Kawa looks at several emerging memories to identify features that could enhance compute power while raising energy efficiency and reducing cost in AI SoCs and the tradeoffs designers will need to make.

Ansys’ Laura Carter considers how a model-based, simulation-centered systems engineering approach will help truck manufacturers make the shift from diesel to battery or fuel cell power systems that require unique software-based powertrain and energy management systems.

Keysight’s Jenn Mullen points to four electric vehicle technologies to watch out for at CES, from battery cell characterization solutions to gigafactory optimization.

Arm’s Anton Kirilov discusses some of the challenges that are faced when trying to implement the WebAssembly specification on the 64-bit Arm architecture and shares several potential implementations and candidate instruction sequences.

In a blog for SEMI, Stacy Ajouri of Texas Instruments, Mark Roos of Roos Instruments, and Albert Fuchigami of PEER Group focus on the Rich Interactive Test Database (RITdb) specification that defines a data and event sharing and streaming methodology for the test industry and explain why it’s not just a new version of STDF.

Plus, catch up on the blogs featured in the latest Systems & Design newsletter:

Technology Editor Brian Bailey looks back at the most popular stories and what they tell about the industry.

Arteris’ Frank Schirrmeister lays out approaches to cache coherency and the memory wall, each serving a unique purpose in optimizing performance and efficiency.

Synopsys’ Kenneth Larsen and Twan Korthorst show how to mitigate heat dissipation and energy consumption concerns while delivering fast data transmission.

Siemens’ Le Hong notes the benefits of extending design-technology co-optimization from technology development to high-volume manufacturing.

Cadence’s Sabnam Sahoo explains key mechanisms for test and fault isolation in PCIe lanes and links.

Keysight’s Jenn Mullen points to how cross-disciplinary innovation is redefining industries like telecommunications, automotive, and healthcare.

Leave a Reply

(Note: This name will be displayed publicly)