Looking back at readership numbers shows the areas that designers need to learn information about for the jobs they are doing today, or know they will need tomorrow.
I always use the last blog of the year to review everything published in the Systems & Design and Low Power – High Performance channels of Semiconductor Engineering, the two channels that I write for. It is useful to see what interests you and, as I have found in the past, it is an indicator of where the industry is going. You read about the issues you are facing as designers, and you need help to solve in the designs you are currently working on, or will be starting shortly.
By far the biggest category with top readership was about 3D-ICs and chiplets. This is probably a reflection about the number of companies that are looking to adopt 2.5D integration, or those looking even further forward to gauge the right time to start thinking about producing commercial chiplets. Surprisingly, at the top of the list was: True 3D Is Much Tougher Than 2.5D. Why so surprising? Because few companies are actually looking at 3D today. In fact, they are just getting started with 2.5D. In this story that I wrote, I said, “While there has been much discussion about 3D designs, there are multiple interpretations about what 3D entails. This is more than just semantics, however, because each packaging option requires different design approaches and technologies. And as chips push into the realm of real 3D-ICs, stacking logic or memory on top of logic, they become much more challenging to design, manufacture, and ultimately yield and test.”
The second-highest read story in this category relates to a real problem that people are just beginning to understand: Mechanical Challenges Rise With Heterogeneous Integration. This story, written by Ed Sperling, talks about companies that are integrating multiple chips or chiplets into a package and need to address structural and other mechanical engineering issues. But there are gaps in the design tools, new materials and interconnect technologies, and a shortage of expertise that is making it difficult to address those issues.
At the same time as people are working out how to build systems with multiple dies, work continues on the problems associated with each of those monolithic die. In Uneven Circuit Aging Becoming A Bigger Problem, Ann Mutschler writes, “Circuit aging is emerging as a first-order design challenge as engineering teams look for new ways to improve reliability and ensure the functionality of chips throughout their expected lifetimes.”
The runner up in this category is a story I wrote, titled What Designers Need To Know About GAA. With finFETS reaching the end of the line after only 12 years of production, they are being supplanted by gate-all-around (GAA), starting at 3nm, which is expected to have a significant impact on how chips are designed.
The next category will perhaps come as no surprise. RISC-V continues to gain momentum, and we can see rapid advancement in standards and ecosystem development. In the top spot is RISC-V Wants All Your Cores. I wrote about how the RISC-V community is no longer content to just disrupt the CPU industry. It is waging war against every type of processor integrated into an SoC or advanced package, an ambitious plan that will face stiff competition from entrenched players with deep-pocketed R&D operations and their well-constructed ecosystems.
The runner-up in this category is part of a round table that I facilitated. Do Necessary Tools Exist For RISC-V Verification? This was a discussion between Cadence, Codasip, Imperas, Siemens, Synopsys, Breker, and Viosoft. They discussed the current RISC-V verification flow and the tools that are missing.
Following closely on its heels were stories that talked about memory. There was a divide in this group into those that talked about HBM and those that talked about fundamental memory technologies, such as ReRAM and MRAM. My colleague Karen Heyman dominated this category, producing the top stories in both subcategories. Leading with HBM’s Future: Necessary But Expensive, high-bandwidth memory is becoming the memory of choice for hyperscalers, but there are still questions about its ultimate fate in the mainstream marketplace. While it’s well-established in data centers, with usage growing due to the demands of AI/ML, wider adoption is inhibited by drawbacks inherent in its basic design. HBM offers a compact 2.5D form factor that enables tremendous reduction in latency.
In the second sub-category is ReRAM Seeks To Replace NOR. Resistive RAM is gaining renewed attention as demand for faster and cheaper non-volatile memory alternatives continues to grow, particularly in applications such as automotive.
Perhaps the biggest surprise this year is what you are not reading about – AI. Maybe there is so much hype everywhere else that you have had your fill, or maybe it is because you don’t expect it to have that much impact on your day-to-day work. The only AI related story to hit the highs on readership was actually related to the implementation of AI on the edge: Will Floating Point 8 Solve AI/ML Overhead? Karen Heyman wrote, “While the media buzzes about the Turing Test-busting results of ChatGPT, engineers are focused on the hardware challenges of running large language models and other deep learning networks. High on the ML punch list is how to run models more efficiently using less power, especially in critical applications like self-driving vehicles where latency becomes a matter of life or death.”
Not all stories fall neatly into categories. One sequence of reports that continues to get as much readership as the top stories are the Startup Funding reports written by Jesse Allen. If you follow these monthly reports, you will know that they are the most in-depth and well researched roundups of relevant funding in the industry.
Another Karen Heyman story, Rethinking Engineering Education In The U.S., takes a deep dive into the ongoing need for talent, causing both industry and academia in America to rethink engineering education, resulting in new approaches and stronger partnerships.
That is a wrap for this year. As always, thanks for reading, thanks to everyone who contributed to all of the stories this year, thanks to our sponsors, and thank you to all of the engineers around the world that are actually making the future possible with the advancement behind the scenes. Happy holidays and see you back here in the New Year.
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