Blog Review: July 21

Using hardware efficiently; SystemVerilog class variables; semi industry changes; ultra-low power ML.


Cadence’s Paul McLellan listens in as Partha Ranganathan of Google argues that a new era of Moore’s Law is emerging, defined both by the efficient design of hardware accelerators and improving the ways that hardware is utilized.

Siemens EDA’s Chris Spear continues exploring classes in SystemVerilog with a look at the relationship between the class variables that point to an object and how to assign between them.

Synopsys’ Mike Gianfagna considers how the semiconductor industry has gained mainstream visibility as systems companies become major customers, plus the new challenges that poses.

In a blog for Arm, researcher Colby Banbury explains the challenges of deploying machine learning inference tasks on ultra-low power systems with limited flash and SRAM to store model weights and activations and some ways to optimize neural network architectures.

In a blog for SEMI, Alissa M. Fitzgerald and Carolyn D. White of A.M. Fitzgerald & Associates stress the importance of having a solid timeline for MEMS product development and realistic expectations about the funding required to reach commercialization.

Ansys’ Laurent Arduin points to how the International Thermonuclear Experimental Reactor is using simulation to demonstrate the feasibility of fusion for commercial energy generation in a safe manner.

Lam Research’s Terry Powell considers why it is important to reduce helium usage in semiconductor manufacturing and some of the challenges in doing so.

Infineon’s Peter Friedrichs points to three areas that have a big impact on silicon carbide device reliability and how to measure them.

Applied Materials’ Llew Vaughan-Edmunds points to how silicon carbide is being used to advance electric vehicles by saving energy, increasing battery life, and reducing weight.

For a change from reading, catch up on the latest videos:

Sensor Fusion Everywhere finds you can learn things by smashing windows with a sledge hammer.

Safe And Robust Machine Learning looks at potential security risks and what needs to be done to make cyberattacks more difficult.

Create chips that can be tested throughout their expected lifetimes, in Design For Test Data.

Dynamically Reconfiguring Logic takes a different approach to using one design across multiple applications.

The electrification of everything will affect power generation, storage and availability, potentially causing Problems In The Power Grid.

Reduce total cost of ownership in data centers with tips on Improving Power & Performance Beyond Scaling.

Changes In Sensors And DSPs show the impact of specialization and combination.

Is it technology or business models that are holding back EDA In The Cloud?

Problems in assisted and autonomous vehicle technology drive efforts to Make Lidar More Useful.

Configuring AI Chips requires keeping up with changes in algorithms and potential interactions.

Why it’s essential to track potential faults throughout a chip’s lifetime and how Monitoring Performance From Inside A Chip provides solutions.

What’s new, what’s changed, and why in the Next-Gen SerDes Roadmap.

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