Blog Review: June 12

PCIe 6.0 switch verification; RDC management; looking to Latin America; debugging complex issues.


Cadence’s Deep Mehta finds that PCIe 6.0 switches need advanced verification strategies that delve deeper than basic functionality, such as generating backpressure traffic to identify potential performance bottlenecks and ensure the switch operates optimally in real-world scenarios.

Siemens’ Reetika explains why proper management and verification of reset domain crossing (RDC) paths are crucial to prevent the myriad risks associated with reset-induced faults, such as data corruption, glitches, metastability, or complete functional failures.

Synopsys’ Victor Grimblatt focuses on Latin America as a key emerging region for developing the semiconductor design and verification workforce.

Arm’s Vincent Yang explains Scandump, a silicon debugging technique that repurposes DFT scan chains for functional debugging, allowing for the extraction of states from registers or latches that are stitched into the scan chains as an aid in identifying and diagnosing complex issues.

Keysight’s Srinath Anantharaman looks to the evolution of encyclopedias to explore the challenges companies face in IP management and shares strategies to ensure IP management remains both scalable and efficient for increasingly heterogeneous IC design projects.

Infineon’s Kimia Azad notes the key differences in new commercial space operations compared to traditional government missions and what the focus on low earth orbit means for satellite electronics.

Ansys’ Thomas Lejeune points to the potential security benefits of using cloud-based CAD/CAE solutions and explains the shared responsibility model for data security for workloads running on AWS.

The ESD Alliance’s Bob Smith chats with Niels Faché of Keysight about the development of leadership skills and the challenges of managing a broad portfolio that encompasses hardware, software, and services.

And don’t miss the blogs featured in the latest Automotive, Security & Pervasive Computing and Test, Measurement & Analytics newsletters:

Synopsys’ Roel Maes delves into quantum algorithms and their impact on the security of current cryptographic techniques.

Rambus’ Emma-Jane Crozier discusses the practical threats that can bypass SoC isolation technologies.

Flex Logix’s Jayson Bethurem digs into the sophistication and variety of today’s physical hacking techniques, highlighting the need for robust cybersecurity measures.

Infineon’s Paul Wiener shows how data centers can meet the high power-per-rack requirements essential for AI workloads.

TXOne’s Mars Cheng explains how attackers disabled industrial sensors and disrupted operations across multiple sectors.

Renesas’ Palash Koutu outlines how voice anti-spoofing works to prevent scam attempts that involve mimicked voices.

Cadence Design Systems’ Veena Parthan explores the multifaceted challenges of aeroacoustic simulations.

Onto Innovation’s Prasad Bachiraju details how chipmakers can leverage massive amounts of process control data to classify defects in real time.

Synopsys’ Lorin Kennedy and Dan Alexandrescu explain how new vehicle electrical architectures can impact reliability.

NI’s Juan Valdivia delves into an automated test system’s TCO, from initial capital to development, deployment, and operational expenses.

Teradyne’s Fisher Zhang shows how ATE and SLT can improve automotive reliability even at higher levels of autonomy.

Nordson’s Muge Deniz Meiller finds unusual applications for piezo valve technology and a compact robot.

Advantest’s Michael Chang describes how AI/ML can boost the speed and accuracy of test and reduce the risk of defects.

DR Yield’s Dieter Rathei outlines how to apply statistical and AI algorithms to detect outliers, anomalies, and abnormalities.

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