Blog Review: March 22

Siloed data slows verification ML; hardware encryption in virtual servers; modeling turbulence; MCU clock accuracy.


Siemens EDA’s Dan Yu warns that the unavailability of verification data is slowing down the development of advanced machine learning for verification, with valuable data assets either siloed among different team members or projects or simply discarded due to the lack of analytic techniques to extract value from them.

Synopsys’ Richard Solomon and Dana Neustadter point to the need for hardware encryption inside virtual servers and introduce a standardized interface framework that defines how to secure the interconnect between the virtual machine host and the device, regardless of where a data center resides or who has access to the servers inside of it.

Cadence’s Veena Parthan notes that understanding, modeling, and predicting turbulence phenomena is key for efficient and environmentally safe design of aircraft, cars, and ships, and introduces a new project to improve turbulence models with AI.

Renesas’ Graeme Clark introduces the Clock Frequency Accuracy Measurement Circuit, a peripheral that enables checking the accuracy of internal and external clock sources available on microcontrollers by automatically referencing them against each other, indicating when there is an unexpected deviation from the resulting comparison.

Arm’s Pablo Barrio shares how LLVM 15 expands support Arm architectures and IP, as well as providing several performance improvements including vectorization with SVE.

Ansys’ Scott Wilkins looks at some of the challenges in recycling plastic and ways recyclers can keep track of the physical properties of recycled plastics and deal with their inherent variability, enabling use in automotive applications.

SEMI’s Cassandra Melvin shares discussions from ISS Europe about the influence of the EU Chips Act on the strategic direction of Europe’s semiconductor industry through 2030 and the legislation’s potential as a powerful instrument to strengthen the industry.

Memory analyst Jim Handy suggests that while January’s semiconductor industry revenue numbers were bad, the market is following a relatively normal and predictable behavior, and expects revenues to mimic the 2019-20 trend for the remainder of 2023.

Plus, check out the blogs featured in the latest Manufacturing, Packaging & Materials newsletter:

Technical Editor Katherine Derbyshire looks at the little changes that add up, from quantum to 3D integration and fab analytics.

Amkor’s Vineet Pancholi warns that the non-ideal nature of items in the paths between the instruments and the device under test can degrade measurement accuracy.

Coventor’s Dempsey Deng evaluates the parasitic capacitance impact of using a Nitride-Oxide-Nitride (NON) spacer, a low-k spacer, and an airgap spacer.

HJL Lithography’s Harry Levinson examines advances in resists, metrology, and illumination systems for EUV.

QP Technologies recently hosted a panel discussion involving a logic and functional specification for chiplets to enable adoption by smaller companies.

SEMI Taiwan’s Ashley Huang explains how GaN enables more power in less space with increased device performance and reduced costs for data centers, communications, and automotive.

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