Blog Review: March 4

DRC for PCBs; IoT security; improving EV mileage.


Mentor’s Shivani Joshi provides a primer on design rule checks and how they can help flag potential issues in PCB design.

Synopsys’ Taylor Armerding argues that while better IoT security requires a change in consumer culture and habits, manufacturers and government should be doing more as well.

Cadence’s Johnas Street chats with several colleagues about what Black History Month means to them, what inspired them to get into technology, and their advice for students.

ANSYS’ Bill Kulp takes a look at four ways that fluid mechanics can help increase the mileage of electric vehicles, from motor and battery cooling to aerodynamics.

Arm’s Jade Alglave shares a tutorial on how to use Arm’s Memory Model Tool for software developers, compiler writers, and verification engineers.

A Rambus writer points to how the architecture of the internet is evolving and why the cloud will still be an important element of the data economy even as edge points become more popular with the advent of 5G.

SEMI’s Maria Vetrano chats with Zhenan Bao of Stanford University about the development of organic electronic materials that mimic skin functions and why it’s a big step for human-machine interfaces.

Plus, don’t miss the blog featured in the latest Systems & Design newsletter:

Editor In Chief Ed Sperling observes that restrictive design rules no longer apply, for better or worse.

EDA Technology Editor Brian Bailey makes the case for a new breed of engineers who can understand both hardware and software, not just firmware.

Cadence’s Frank Schirrmeister examines what’s changed – and what hasn’t – in the past 30 years of software.

Mentor’s Wei-Lii Tan digs into why validating LVF data for accuracy and correctness is a key factor to achieving timing closure and silicon success.

OneSpin’s Sergio Marchese looks at the risk of hardware Trojans lurking in open-source and third-party IP.

Synopsys’ Taruna Reddy looks at what happens when you can’t count on ever-faster processors to improve simulation performance.

Imagination’s Shewan Yitayew digs into the new features in BLE 5.2 that will enable new uses cases and transform the way we consume and share audio.

Aldec’s Michelle Mata explains why early and accurate hardware and software co-verification can eliminate several ARM-based SoC challenges.

Leave a Reply

(Note: This name will be displayed publicly)