Blog Review: Oct. 28

Vehicle cybersecurity standards; hybrid wafer bonding; C++ questions; GAA challenges.


Synopsys’ Jacob Wilson provides some tips for how to prepare for the upcoming ISO SAE 21434 cybersecurity standard for road vehicles, starting with a security plan and understanding of risk levels.

Cadence’s Paul McLellan checks out Arm’s first face-to-face wafer-bonded design, why it might be desirable, and some important aspects of how the proof-of-concept was developed.

In a video, Mentor’s Colin Walls answers some C++ questions, including the usefulness of default parameters and when to use multiple constructors.

Lam Research’s Nerissa Draeger considers how gate-all-around transistor structures can enable continued scaling and PPAC improvements and some of the challenges and new materials needed to manufacture them.

Arm’s Pravin Kantak explains the 5G Radio Access Network (RAN) architecture and introduces an acceleration library of optimized software routines for 5G wireless base stations.

Ansys’ Susan Coleman checks out how startup Arbe is expanding automotive radar by adding real elevation to the standard range, velocity, and azimuth detection with its chip that includes 48 transmitting antennas and 48 receiving antennas in a 10 mm x 10 mm package.

In a blog for SEMI, VLSI Research’s John West checks out the cleanroom robot market and the steps in which they are deployed.

NXP’s James Goodland argues that unmanned, automated convenience stores weren’t just hype, and in spite of the initial flurry of openings and then closings, there are still opportunities for operators to be successful.

And don’t miss the blogs featured in the latest Manufacturing, Packaging & Materials newsletter:

Editor in Chief Ed Sperling argues that new technologies and approaches will radically alter how we view scaling in the future.

Executive Editor Mark LaPedus lays out a Gartner analyst’s outlook for semis.

Amkor’s Ajay Sattu looks at emerging trends in automotive, cloud, and 5G that are pushing new improvements in power packaging.

Coventor’s David Fried explains how to simulate all of the processing that occurs when real wafers are built for thorough process testing and optimization.

Brewer Science’s Hao Lee examines how minimizing defects in films makes for better yield and manufacturing results.

Quik-Pak’s Ken Molitor digs into why RF-optimized packaging products and processes are essential to the 5G ramp-up.

SEMI’s Bee Bee Ng takes a tour of key technologies, challenges, and opportunities in smart manufacturing.

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