Irresistible engineers; startups; springs; saving time; solar time; memories; optimization.
By Ed Sperling
It’s amazing how irresistible an engineer suddenly becomes when he has an FPGA prototyping board in his hands. Check out the photo of Synopsys’ Mick Posner in Taiwan.
Cadence’s Brian Fuller digs into semiconductor startups, why there’s been such a lull, and how new startups are changing.
Mentor’s John Day picks out a new product category from TI—inductance to digital converters. This is one of the stranger classes of sensors. It picks up compression, extension, or the twisting of a spring.
Synopsys’ Karen Bartleson sits down with ST’s CAD manager to talk about interoperability of virtual prototypes. Saving time takes a lot of effort.
Cadence’s Richard Goering takes a look at a verification project by Siemens Healthcare. There’s nothing like comparing a project timetable without good tools to the time that the sun has been in existence. That really gets the attention of upper management.
Mentor’s Marko Chew takes a deep dive into embedded memory and their impact on power grids. Given the amount of real estate memory takes on a chip, this is an important subject.
Atrenta’s Mike Gianfagna looks at some big new risks in the IC supply chain.
Ansys Apache’s Chris Ortiz digs into transient current peaks and how they can affect an SoC’s operation.
Jasper’s Joe Hupcey examines the hidden side of power optimization with equivalence checking.
Nvidia’s Barry Pangrle checks out the new high-performance architectures from Intel and IBM and finds one big differentiator—fully depleted SOI.
Steps are being taken to minimize problems, but they will take years to implement.
But that doesn’t mean it’s going to be mainstream anytime soon.
Companies are speeding ahead to identify the most production-worthy processes for 3D chip stacking.
New capacity planned for 2024, but production will depend on equipment availability.
Number of options is growing, but so is the list of tradeoffs.
Increased transistor density and utilization are creating memory performance issues.
Suppliers are investing new 300mm capacity, but it’s probably not enough. And despite burgeoning 200mm demand, only Okmetic and new players in China are adding capacity.
The industry reached an inflection point where analog is getting a fresh look, but digital will not cede ground readily.
100% inspection, more data, and traceability will reduce assembly defects plaguing automotive customer returns.
Engineers are finding ways to effectively thermally dissipate heat from complex modules.
Different interconnect standards and packaging options being readied for mass chiplet adoption.
Steps are being taken to minimize problems, but they will take years to implement.
Disaggregation and the wind-down of Moore’s Law have changed everything.
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