Blog Review: Sept. 18

Irresistible engineers; startups; springs; saving time; solar time; memories; optimization.

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By Ed Sperling
It’s amazing how irresistible an engineer suddenly becomes when he has an FPGA prototyping board in his hands. Check out the photo of Synopsys’ Mick Posner in Taiwan.

Cadence’s Brian Fuller digs into semiconductor startups, why there’s been such a lull, and how new startups are changing.

Mentor’s John Day picks out a new product category from TI—inductance to digital converters. This is one of the stranger classes of sensors. It picks up compression, extension, or the twisting of a spring.

Synopsys’ Karen Bartleson sits down with ST’s CAD manager to talk about interoperability of virtual prototypes. Saving time takes a lot of effort.

Cadence’s Richard Goering takes a look at a verification project by Siemens Healthcare. There’s nothing like comparing a project timetable without good tools to the time that the sun has been in existence. That really gets the attention of upper management.

Mentor’s Marko Chew takes a deep dive into embedded memory and their impact on power grids. Given the amount of real estate memory takes on a chip, this is an important subject.

Atrenta’s Mike Gianfagna looks at some big new risks in the IC supply chain.

Ansys Apache’s Chris Ortiz digs into transient current peaks and how they can affect an SoC’s operation.

Jasper’s Joe Hupcey examines the hidden side of power optimization with equivalence checking.

Nvidia’s Barry Pangrle checks out the new high-performance architectures from Intel and IBM and finds one big differentiator—fully depleted SOI.