Blog Review: September 6

Cadence’s Reela Samuel listens in as industry experts discuss whether generative AI-powered tools could facilitate the creation of diverse chip types and address talent shortages by creating  a more accessible entry point for those interested in circuit, chip, or system design.

Synopsys’ Ian Land, Jigesh Patel, and Kenneth Larsen find that the way that today’s government, aerospace, and defense systems are designed has changed dramatically, with 3D heterogeneous integration and photonics playing a big role.

Siemens’ Martin Keim highlights the current efforts toward a IEEE 1687 and 1149.1 refresh for a more universal and coordinated JTAG world going forward.

Arm’s Paul Williamson points to a survey of IoT technologists to find out what segments they see embracing IoT and the challenges that still exist in lengthy development cycles, software compatibility complexity, and ensuring product security throughout the development and end-of-life phases.

Ansys’ Kelly Damalou presents a primer on radio frequency ICs, including major components of an RFIC design, use cases, and an electromagnetic simulation workflow.

Codasip’s Tora Fridholm introduces that SYCLOPS project, which aims to advance AI and data mining for extremely large and diverse data, and the role of domain-specific accelerators.

Keysight’s Anna McCowan points to three test approaches that can help improve and future proof in-vehicle infotainment systems.

Infineon’s Ashwin Kumar checks out microcontroller protection units and how they work to prevent accidental or malicious interference to a memory region by a process or a component.

Renesas’ Kayoko Nemoto introduces the major industrial Ethernet protocols and what differentiates them.

Eindhoven University of Technology’s Erwin Kessels shows off an animation that summarizes the role of ions during plasma ALD in a concise and fairly simple way along with an overview of the university’s research on the topic.

SEMI’s Margaret Kindling shares a few trivia tidbits.

For a change of pace, check out one of our recent videos:

Speeding the rollout of new process technology means overcoming Challenges In Ramping New Manufacturing Processes.

Why and where Manual X-ray Inspection is gaining traction.

Speeding Up Design Closure and the factors that can impact time-to-market for advanced nodes and packages.

Why High-NA EUV is necessary, when it’s coming, and what still needs to be done.

Architecting chips for maximum performance, low power, and configurability means assessing Tradeoffs In DSP Design.

New Approaches To Sensors And Sensing show how sensor fusion and AI/ML are changing what can be done with sensors.

Why it’s worth Using AI To Close Coverage Gaps, when to use it, and what benefits it brings.

RTL Restructuring Issues and why making changes in chip design needs to happen as early as possible.

AI/ML, RISC-V, chiplets, and engineering talent top the list of Megatrends At DAC.

The Challenges Of Heterogeneous Integration and cramming more features into a small space.

Customization, reliability, and much more data are leading to Changes In Memory Design.

Striking A Balance In Acoustic Inspection and using sound energy to quickly spot defects.