UPF 3.0 Moves Toward Ratification
By Ann Mutschler - 09 Apr, 2015 - Comments: 0

[gettech id="31044" t_name="UPF"] (Unified Power Format) 3.0 — the fourth incarnation in 10 years — is moving closer to the IEEE ballot process. Erich Marschner, verification architect at [getentity id="22017" e_name="Mentor Graphics"] and vice chair of the [gettech id="31043" comment="IEEE 1801"] working group, explained the working group is as close as possible to being on schedule for... » read more

Taming Lint With Formal
By Ravindra Aneja - 09 Apr, 2015 - Comments: 1

Designers have been using Linting tools for many years to ensure designs adhere to recommended coding guidelines. Linting tools verify that RTL is written in an unambiguous way to ensure that downstream tools (simulation, synthesis, etc.) do not interpret the code incorrectly, resulting in design, verification, timing or implementation issues. Linting tools take advantage of fast and shallow... » read more

The Power Estimation Challenge
By Lauro Rizzatti - 09 Apr, 2015 - Comments: 0

If you wonder how important low power is in chip design today, consider the recent news in the blogosphere reporting the controversy surrounding Qualcomm’s Snapdragon 810 SoC — the company’s first flagship 64-bit chip, which will most likely power the top Android devices released in 2015. The story broke in early December along the lines that the 810 had problems with overheating. Whet... » read more

Fighting Dark Silicon With Specialized Hardware
By Ann Mutschler - 09 Apr, 2015 - Comments: 1

Looking at an SoC design from an architecture viewpoint, I’m hearing more discussion lately about the option of offloading tasks to specialized hardware. Especially where dark silicon is concerned, rather than having four or eight ARM processors — all with the same complexity — or cores like graphics processors, if you cannot use them all at full performance and they have to be shut o... » read more

UPF-Driven RTL Power Budgeting For Energy-Efficient Designs
By Arti Dwivedi - 09 Apr, 2015 - Comments: 1

Energy efficiency of devices has become more critical than ever, with shrinking geometries and increased performance requirements of SoCs in applications ranging from mobile, storage, automotive to processors. Power management, therefore, becomes an important part of IP and SoC design methodology. While power management is critical in all design stages, an important aspect of this methodolog... » read more

How We’ll Get There from Here
By Brian Fuller - 09 Apr, 2015 - Comments: 0

The electronics industry is like a battleship with remarkable handling properties. I thought about it this week sitting at an industry event a day after stumbling across Neptune—the technology project, not the god. Those two experiences forced me to rethink some fundamental assumptions about system design and how the ecosystem responds to change. If you’ve not heard of Neptune, it�... » read more

Is Dark Silicon Wasted Silicon?
By Ann Mutschler - 09 Apr, 2015 - Comments: 0

The concept of dark silicon sounds almost mysterious, but it is a simple matter of physics. With advances in technology nodes and the ability to pack more and more transistors on the same die, design engineers are reaching a wall where only a fraction of a design can be powered on due to power and thermal implications. Moreover, the challenges that force this kind of complex power managemen... » read more

Does Fast Simulation Help Debug Productivity?
By Brian Bailey - 09 Apr, 2015 - Comments: 0

It is nice when a reporter manages to get the scoop of the century, and that was the case at a lunch panel hosted by [getentity id="22032" e_name="Cadence"] at the recent Design and Verification Conference (DVCon) in Santa Clara, CA. Brian Bailey, technology editor for Semiconductor Engineer was the moderator for the panel and broke the news to the crowd. Cadence had developed a logic [getkc id... » read more

Securing 4K Content And Beyond Over HDMI
By Angela Raucher - 09 Apr, 2015 - Comments: 0

By Angela Raucher & Dana Neustadter As we move into the era of transmitting and receiving 4K Ultra-High Definition (UHD), High Dynamic Range (HDR) and even 8K UHD content, robust security becomes even more important for the protection of premium content. Today, High-Definition Multimedia Interface (HDMI) is the most widely used, and sometimes the only interface to connect high-resolution c... » read more

What Is Coherency?
By Neil Parris - 09 Apr, 2015 - Comments: 0

Coherency is about ensuring all processors, or bus masters in the system see the same view of memory. Cache coherency means that all components have the same view of shared data. Just as you need both of your eyes to have the same view in order to see properly, it’s critical for every IP block that has access to a shared data source to view consistent data. For example, if I have a process... » read more

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