Improving DRAM Performance Using Dual Work-Function Metal Gate (DWMG) Structures


Dynamic Random Access Memory (DRAM) serves as the backbone of modern computing, enabling devices ranging from smartphones to high-performance servers. As the demand accelerates for higher density and lower power consumption in memory devices, innovation in reducing DRAM leakage currents and enhancing performance becomes essential. One significant challenge in scaling DRAM technology is gate-... » read more

Reflecting On The SPIE Advanced Lithography + Patterning Symposium 2025


The mood at this year’s SPIE Advanced Lithography + Patterning Symposium was decidedly upbeat. The outlook for business is good, due in large measure to expectations of high demand for chips, driven by artificial intelligence (AI). To realize the potential of AI, increases in chip performance and efficiency are needed, which, in turn, requires advanced patterning. In the Symposium’s technic... » read more

Using Glass As A Dielectric In Electronic Packaging


As demand for higher-performance, more compact and energy-efficient electronics continues to escalate, traditional organic based substrates are approaching practical limitations, leading to industry experimentation with alternative materials. To this end, glass substrates have emerged as a promising alternative with distinct benefits for semiconductor packaging. Major chipmakers, including ... » read more

Four Things Every Engineer Should Know About PFAS


What are PFAS chemicals? “PFAS” is an acronym for per- and polyfluoroalkyl substances. These man-made chemicals migrate into soil, water, and air when produced and used. There are many ways humans come in contact with PFAS, such as in non-stick cookware or cosmetics, but by far the most significant impact on human health is when PFAS is consumed in drinking water. Exposure to PFAS may resu... » read more

AI And Semiconductor In Reciprocity


In today’s rapidly advancing technological era, AI has become a powerful catalyst for innovation and progress. Advanced semiconductor packaging plays a crucial role in supporting AI development, while AI applications create new semiconductor demands and drive the development of semiconductor technologies, with both complementing each other. Semiconductor packaging: The bridge between chip an... » read more

What Exactly Are Chiplets And Heterogeneous Integration?


The terms “chiplet” and “heterogeneous integration” fill news pages, conference papers, and marketing presentations, and for the most part engineers understand what they're reading. But speakers sometimes stumble during a presentation trying to figure out whether a particular die qualifies as a chiplet, and heterogeneous integration comes in different guises for different people. Both t... » read more

The Rise Of Thin Wafer Processing


The shift from planar SoCs to 3D-ICs and advanced packages requires much thinner wafers in order to improve performance and reduce power, reducing the distance that signals need to travel and the amount of energy needed to drive them. Markets calling for ultrathin wafers are growing. The combined thickness of an HBM module with 12 DRAM dies and a base logic chip is still less than that of a ... » read more

Sustainable AI Systems For Energy-Efficient Computing


By Pushkar Apte, Jim Sexton, and Melissa Grupen-Shemansky The world is abuzz with the new opportunities being created by artificial intelligence (AI), enabled by the availability of unprecedented amounts of data. AI runs on the semiconductor engine, and in turn, creates a rising demand for semiconductor chips. The semiconductor industry is predicted to reach $1 trillion in revenue by 2030 ... » read more

Many Options For EUV Photoresists, No Clear Winner


In EUV lithography, and especially high-numerical-aperture EUV, balancing tradeoffs between resolution, sensitivity and line-width roughness is becoming increasingly difficult. Lithography patterning using extreme UV exposure depends on a resist mask that can simultaneously meet targets of small feature resolution, high sensitivity to EUV wavelength, and acceptable linewidth roughness. Unfor... » read more

EFO Errors In The Wire-Bonding Semiconductor Packaging Process


A new technical paper titled "A Comparative Study on Various Au Wire Rinse Compositions and Their Effects on the Electronic Flame-Off Errors of Wire-Bonding Semiconductor Package" was published by researchers at Hanbat National University, Seoul National University and Chungnam National University. The paper states: "In this study, we identify the origin of electronic flame-off (EFO) erro... » read more

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