Impact of AI On IP And Chip Design
By Expedera - 14 May, 2025 - Comments: 0

By Global Semiconductor Alliance (GSA) In conjunction with the Global Semiconductor Alliance's IP Interest group, Expedera explores the impact of AI on intellectual property (IP) and Chip Design, providing comprehensive details and multifaceted data to cover all aspects of the semiconductor industry. It highlights AI growth trends, market predictions, and current silicon chip design innovati... » read more

Report: The Future of AI Processing
By Arm - 14 May, 2025 - Comments: 0

AI is now emerging in everyday use cases thanks to advances in foundational models, powerful chip technology, and abundant data. As a result, new approaches in AI compute are required to deploy these advanced use cases with minimal effort. This report features insights on how to move AI forward from industry leaders at AWS, Meta, Samsung and Arm, and includes research from MIT Technology Rev... » read more

Innovus+ Synthesis And Implementation System
By Cadence - 14 May, 2025 - Comments: 0

The Innovus+ platform incorporates Innovus synthesis and Innovus implementation capabilities, all integrated into one unified environment for outstanding ease of use and power, performance, and area (PPA) results. Innovus+ Synthesis can be used standalone to generate physically aware netlists ready for handoff to other design teams, such as ASIC partners, or the implementation flow can conti... » read more

Blog Review: May 14
By Jesse Allen - 14 May, 2025 - Comments: 0

Siemens’ Stephen V. Chavez finds that proper PCB high voltage spacing between conductive elements is key to reliability and understanding the principles of clearance (through-air spacing) and creepage (along-surface spacing) is critical. Cadence’s Frank Ferro checks out how the new HBM4 standard boosts bandwidth and addresses key issues in the data center, including the growing size of L... » read more

E-Powertrain EMC Design And Validation
By Ansys - 14 May, 2025 - Comments: 0

In the pursuit of zero-emission vehicles, the design of the e-powertrain and its electronic systems encounters numerous challenges. From stringent regulatory requirements to the demand for enhanced performance and efficiency, the landscape is ripe with complexities. Here, simulation emerges as a vital tool, offering a pathway to navigate these challenges with precision and innovation. What y... » read more

Chip Industry Technical Paper Roundup: May 13
By Linda Christensen - 13 May, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=430 /] Find more semiconductor research papers here.   » read more

Research Bits: May 13
By Jesse Allen - 13 May, 2025 - Comments: 0

Benchmarking 3D-IC cooling Researchers from Massachusetts Institute of Technology (MIT) and HRL Laboratories developed a specialized chip to test and validate cooling solutions for packaged chip stacks. The chip dissipates extremely high power, generating heat through the silicon layer and in localized hot spots to mimic high-performance logic chips. It then uses diodes to measure temperatu... » read more

Conversing With Your Dishwasher
By Ed Sperling - 12 May, 2025 - Comments: 0

What does "Error 22" mean on your smart appliance? Today, most people have to look it up on the internet, but that's about to change. John Weil, vice president and general manager for Synaptics IoT and Edge AI Processor business unit, talks about how AI can be inexpensively and efficiently utilized by mapping directly to a database using a natural language interface. Unlike today, that informat... » read more

Security Risks Mount For Aerospace, Defense Applications
By Liz Allan - 12 May, 2025 - Comments: 1

Supply chain and hardware security vulnerabilities affect all industries, but they pose additional risks for the defense sector. Over-manufacturing and re-manufacturing allow chips from friendly nations to end up in the weapons of adversaries. And side-channel attacks such as power analysis or fault injection, as well as internet-based distributed denial of service (DDoS) attacks, provide a mea... » read more

Comparisons of HW Versus SW Implementation of Warp Level Features in Vortex RISC-V GPU (Georgia Tech, IIT)
By Technical Paper Link - 11 May, 2025 - Comments: 0

A new technical paper titled "Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU" was published by researchers at Georgia Tech and Indian Institute of Technology Bombay. Abstract "RISC-V GPUs present a promising path for supporting GPU applications. Traditionally, GPUs achieve high efficiency through the SPMD (Single Program Multiple Data) programming model. Ho... » read more

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