Circuit Layout-Level Hardware Trojan Detection
By Technical Paper Link - 09 May, 2023 - Comments: 0

A new technical paper titled "A Needle in the Haystack: Inspecting Circuit Layout to Identify Hardware Trojans" was published by researchers at The University of Texas at Dallas and Qualcomm. Abstract "Distributed integrated circuit (IC) supply chain has resulted in a myriad of security vulnerabilities including that of hardware Trojan (HT). An HT can perform malicious modifications on an I... » read more

28nm-HKMG-Based FeFET Devices For Synaptic Applications
By Technical Paper Link - 09 May, 2023 - Comments: 0

A technical paper titled "28 nm high-k-metal gate ferroelectric field effect transistors based synapses- A comprehensive overview" was published by researchers at Fraunhofer-Institut für Photonische Mikrosysteme IPMS, Indian Institute of Technology Madras, and GlobalFoundries. Abstract This invited article we present a comprehensive overview of 28 nm high-k-metal gate-based ferroelectric f... » read more

Reconfigurability and NTC-based Signal Modulation Within a Single Ferroelectric TFET
By Technical Paper Link - 09 May, 2023 - Comments: 0

A new technical paper titled "Reconfigurable signal modulation in a ferroelectric tunnel field-effect transistor" was published by researchers at Lund University in Sweden. Abstract: "Reconfigurable transistors are an emerging device technology adding new functionalities while lowering the circuit architecture complexity. However, most investigations focus on digital applications. Here, we ... » read more

Smelling The Metaverse Via Wearable Wireless Interfaces
By Technical Paper Link - 09 May, 2023 - Comments: 0

A new technical paper titled "Soft, miniaturized, wireless olfactory interface for virtual reality" was published by researchers at  City University of Hong Kong, Hong Kong Science Park, Beihang University, and others. Abstract "Recent advances in virtual reality (VR) technologies accelerate the creation of a flawless 3D virtual world to provide frontier social platform for human. Equall... » read more

Pinpointing Timing Delays Can Improve Chip Reliability
By Anne Meixner - 09 May, 2023 - Comments: 0

Growing pressure to improve IC reliability in safety- and mission-critical applications is fueling demand for custom automated test pattern generation (ATPG) to detect small timing delays, and for chip telemetry circuits that can assess timing margin over a chip's lifetime. Knowing the timing margin in signal paths has become an essential component in that reliability. Timing relationships a... » read more

3D Structures Challenge Wire Bond Inspection
By Karen Heyman - 09 May, 2023 - Comments: 1

Adding more layers in packages is making it difficult, and sometimes impossible, to inspect wire bonds that are deep within the different layers. Wire bonds may seem like old technology, but it remains the bonding approach of choice for a broad swath of applications. This is particularly evident in automotive, industrial, and many consumer applications, where the majority of chips are not de... » read more

Optimizing Scan Test For Complex ICs
By Gregory Haley - 09 May, 2023 - Comments: 0

As chips become more heterogeneous with more integrated functionality, testing them presents increasing challenges — particularly for high-speed system-on-chip (SoC) designs with limited test pin availability. In addition, the complexity of emerging packages like 3D and chiplets necessitates comprehensive new solutions that can provide faster results at multiple stages in the silicon lifec... » read more

Addressing Yield Challenges In Advanced IC Substrate (AICS) Packaging
By Keith Best - 09 May, 2023 - Comments: 0

No matter how you get your news, it seems like everyone is talking about AI – and it’s either going to usher in a new era of productivity or lead to the end of humankind itself. Regardless, the AI era is here, and it’s just beginning to have an impact on our lives, our jobs and our future. To meet the rigorous demands of AI – along with high-performance compute, 5G and electric vehic... » read more

Data Analytics For The Chiplet Era
By Shinji Hioki - 09 May, 2023 - Comments: 0

This article is based on a paper presented at SEMICON Japan 2022. Moore’s Law has provided the semiconductor industry’s marching orders for device advancement over the past five decades. Chipmakers were successful in continually finding ways to shrink the transistor, which enabled fitting more circuits into a smaller space while keeping costs down. Today, however, Moore’s Law is slowin... » read more

Preventing Process Excursion With AI And Yield Management Software
By Krista Tropper - 09 May, 2023 - Comments: 0

Process excursion, or any deviation in a certain process, significantly impacts the cost of semiconductor manufacturing process and product yield. During production, process excursion can be detected early during in-line inspections. However, in some cases, excursion isn’t detected until later in the production process such as during wafer testing in the probing area after production. Apar... » read more

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