How Gamification Improves Semiconductor IP Reuse


In today’s increasingly complex semiconductor industry, companies are always looking for new and innovative ways to maximize the value of their Intellectual Property (IP) assets. One way to do this is through the use of crowdsourcing and gamification. Crowdsourcing is the process of obtaining services, ideas, or content by enlisting a large number of people, typically through an online platfo... » read more

Process Innovations Enabling Next-Gen SoCs and Memories


Achieving improvements in performance in advanced SoCs and packages — those used in mobile applications, data centers, and AI — will require complex and potentially costly changes in architectures, materials, and core manufacturing processes. Among the options under consideration are new compute architectures, different materials, including thinner barrier layers and those with higher th... » read more

Measuring 3D Sidewall Topography & LER for Photoresist Patterns Using Tip-Tilting AFM Technology


A new technical paper titled "Enhancing the precision of 3D sidewall measurements of photoresist using atomic force microscopy with a tip-tilting technique" by researchers at National Metrology Institute of Japan (NMIJ) and National Institute of Advanced Industrial Science and Technology (AIST). "We have developed a technique for measuring the sidewall of the resist pattern using atomic for... » read more

HW-SW Co-Design Solution For Building Side-Channel-Protected ML Hardware


A technical paper titled "Hardware-Software Co-design for Side-Channel Protected Neural Network Inference" was published (preprint) by researchers at North Carolina State University and Intel. Abstract "Physical side-channel attacks are a major threat to stealing confidential data from devices. There has been a recent surge in such attacks on edge machine learning (ML) hardware to extract the... » read more

HBM-Enabled FPGA-Based Graph Processing Accelerator


A technical paper titled "ACTS: A Near-Memory FPGA Graph Processing Framework" was published by researchers at University of Virginia and Samsung. Abstract: "Despite the high off-chip bandwidth and on-chip parallelism offered by today's near-memory accelerators, software-based (CPU and GPU) graph processing frameworks still suffer performance degradation from under-utilization of available ... » read more

Week In Review: Semiconductor Manufacturing & Test


The Biden Administration’s export bans for semiconductor manufacturing equipment are delaying expansion plans for Chinese chipmakers, Nikkei Asia reports. Yangtze Memory Technologies (YMTC) has halted work on its second memory plant near Wuhan, and ChangXin Memory Technologies (CMTX) says its second production facility, slated to open in 2023, will be delayed until 2024 or 2025. In an effo... » read more

Week In Review: Design, Low Power


It’s earnings season. Arm, Cadence, Synopsys, Siemens (consolidated), Rambus, and Renesas reported quarterly results over the past couple weeks. All posted year-over-year revenue growth, despite an overall challenging macroeconomic climate. A roundup of all the chip industry earnings reports from the past several weeks can be found here. The edge computing market is projected to jump to al... » read more

Week In Review: Auto, Security, Pervasive Computing


Tesla will recall 362,000 U.S. vehicles over Full Self-Driving (FSD) Beta software after the National Highway Traffic Safety Administration (NHTSA) found that the cars sometimes have unsafe behavior around intersections when using the FSD Beta system. Examples are “traveling straight through an intersection while in a turn-only lane, entering a stop sign-controlled intersection without coming... » read more

Review of Tools & Techniques for DL Edge Inference


A new technical paper titled "Efficient Acceleration of Deep Learning Inference on Resource-Constrained Edge Devices: A Review" was published in "Proceedings of the IEEE" by researchers at University of Missouri and Texas Tech University. Abstract: Successful integration of deep neural networks (DNNs) or deep learning (DL) has resulted in breakthroughs in many areas. However, deploying thes... » read more

Looking Forward To SPIE, And Beyond


On the eve of this year’s SPIE Advanced Lithography + Patterning conference, I took a look at the IEEE Devices and Systems Roadmap’s lithography section. It’s especially notable for the emergence of EUV lithography, which has quickly become critical for advanced logic. High-NA tools to support still smaller dimensions are on the horizon. In the near-term, though, the key challenge is not ... » read more

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