Optimizing Data Center TCO With CXL And Compression


In the ever-evolving landscape of data centers, Total Cost of Ownership (TCO) remains a critical metric. It encompasses all costs associated with data center infrastructure throughout its lifecycle, including initial purchase, installation, utilization, maintenance, energy consumption, and eventual replacement. By understanding and optimizing TCO, hyperscalers can make informed decisions that e... » read more

Signal Integrity Plays Increasingly Critical Role In Chiplet Design


Maintaining the quality and reliability of electrical signals as they travel through interconnects is proving to be much more challenging with chiplets and advanced packaging than in monolithic SoCs and PCBs. Signal integrity is a fundamental requirement for all chips and systems, but it becomes more difficult with chiplets due to reflections, loss, crosstalk, process variation, and various ... » read more

How SPDM Can Drive Digital Transformation


While simulation has proven to help companies develop better products faster and more efficiently, it also produces copious amounts of data. Simulation process data management (SPDM) solutions further accelerate and improve the approach to product development and serve as the cornerstone for implementing and optimizing the digital thread in modern product development. Ansys subject matter ex... » read more

Normalization Keeps AI Numbers In Check


AI training and inference are all about running data through models — typically to make some kind of decision. But the paths that the calculations take aren’t always straightforward, and as a model processes its inputs, those calculations may go astray. Normalization is a process that can keep data in bounds, improving both training and inference. Foregoing normalization can result in at... » read more

Symmetric Multiprocessing (SMP) RTOS On Xtensa Multicore


An increasing number of multi-threaded embedded applications want to leverage multicore designs. Symmetric Multiprocessing (SMP) RTOS provides automatic load balancing of multiple threads in a multicore environment. Also, numerous legacy multi-threaded embedded applications are deployed on a single-core RTOS that customers want to move to a multicore environment. For these reasons, application ... » read more

Beyond Simulation: Transforming Early IC Design With Insight Analyzer


Traditional verification methods are proving inadequate for addressing critical reliability challenges in today's increasingly complex integrated circuit (IC) designs. Modern IC design requires a proactive approach to verification that emphasizes early-stage analysis. The shift-left methodology enables earlier identification of potential design risks, addressing the complex challenges of IP blo... » read more

Building Vision-Enabled Devices To Capture The Emerging Wave In IoT


The evolution of vision (the eye) is considered one of the most significant events in the history of life on Earth. 540 million years ago, during the Cambrian period, there was a sudden burst of evolutionary activity that resulted in the appearance of a variety of new species. Many of these species were characterized by the development of an eye which allowed them to perceive and interact with ... » read more

What Exactly Is Multi-Physics?


Multi-physics is the new buzzword in semiconductor design and analysis, but the fuzziness of the term is a reflection of just how many new and existing problems need to be addressed simultaneously in the design flow with advanced nodes and packaging. This disaggregation of planar SoCs and the inclusion of more processing elements, memories, interconnects, and passives inside a package has cr... » read more

Uncore Frequency Scaling For Energy Optimization In Heterogeneous Systems (UIC, Argonne)


A new technical paper titled "Exploring Uncore Frequency Scaling for Heterogeneous Computing" was published by researchers at University of Illinois Chicago and Argonne National Laboratory. Abstract "High-performance computing (HPC) systems are essential for scientific discovery and engineering innovation. However, their growing power demands pose significant challenges, particularly as sys... » read more

Simulation Study Of Vertically Stacked 2D NSFETs


A new technical paper titled "Simulation of Vertically Stacked 2-D Nanosheet FETs" was published by researchers at Università di Pisa and TU Wien. Abstract "We present a simulation study of vertically stacked 2-D nanosheet field-effect transistors (NSFETs). The aim of this investigation is to assess the performance and potential of FinFET alternatives, i.e., gate-all-around (GAA) nanosheet... » read more

← Older posts Newer posts →