Scaling Ultra-Low-Power Edge Intelligence For Smart Devices


For decades, the data collection pipeline for sensors has been the exact same—measure, transmit, and process elsewhere. While it’s been a failproof method all these years, it’s also resulted in a large amount of energy consumption, meaning your smart watch could have a longer battery life. Neuronova is aiming to change things up. The company’s goal? Empowering the next generation of ... » read more

Wi-Fi 7 for IoT


Introduced in 2024, Wi Fi 7 delivers numerous PHY and MAC layer enhancements for high performance networking, including 320 MHz channels, 4096 QAM modulation, and up to eight spatial streams (8×8 MIMO). While these capabilities are important for access points and high throughput clients, they are less relevant to IoT devices, which typically operate at low data rates with small payloads, const... » read more

Navigating Software-Defined Vehicle Development


The automotive industry is experiencing a profound transformation as vehicles shift from primarily mechanical systems to high-performance, software-driven platforms. The emergence of Software-Defined Vehicles (SDVs) is reshaping the value chain, requiring OEMs and their partners to rethink design, development, and validation strategies. This content outlines how convergence of silicon and sy... » read more

Flexible ICs, MEMS, Metal Oxides Solve Fresh Problems


Key Takeaways: Flexible ICs are durable and form-fitting, but they add manufacturing challenges to already complex processes, while printed flex sensors lack infrastructure. MEMS are finding new popularity in massively parallel systems, on one device, or in many devices distributed across a network. Metal oxide-based sensors are more scalable than those relying on photonic crystals, ... » read more

Optimize Digital Payloads With Radiation Hardened GaN


As the demand for greater communication bandwidth continues to grow, next-generation satellites must deliver higher data throughput for digital payloads. This shift to digital payloads requires engineers to reassess key design parameters, such as material needs, operational factors, and radiation robustness, to ensure optimal performance in their space power systems. Infineon HiRel’s new radi... » read more

The Power of Proof: Turning CMMC Compliance into Competitive Credibility


To help the U.S. Defense Industrial Base (DIB) navigate the path to Cybersecurity Maturity Model Certification (CMMC), Keysight Technologies commissioned SIS International Research to conduct an independent, multi-phase study evaluating cybersecurity readiness among contractors, subcontractors, and suppliers. The research combines a thorough review of regulatory frameworks and market structures... » read more

300mm Fab-Compatible Integration Flow for Planar 2D FETs (imec, KU Leuven)


Imec and KU Leuven researchers published "Integration and electrical evaluation of WS2 and MoS2 fets in a 300 mm pilot line." Abstract "2D materials have the potential to extend and augment the CMOS scaling roadmap. However, upscaling from lab-based demonstrators to 300 mm-compatible integration modules presents unique challenges. In this work, we address these challenges through ... » read more

Blog Review: Feb. 4


Siemens' Tova Levy examines thermal management in 3D-IC, including why heat behaves differently in vertical stacks and how to analyze and manage thermal risk earlier and more predictably to ensure a design can meet performance, reliability, and time-to-market targets. Cadence's Reela Samuel finds that known-good-die strategies, standardized die-to-die test access, and vertical reliability mo... » read more

Changes In Chip Architectures At The Edge


Edge computing is all about low latency, within a tight power budget, and with sufficient performance. This is very different from an AI data center, where the real focus is on data throughput between processor and memory. Achieving those goals requires a focus on what different processing elements bring to the table. Nigel Drego, co-founder and CTO of Quadric, talks about how these different c... » read more

Why Move To 2nm?


Key Takeaways: Scaling digital logic still provides significant benefits, especially lower power. Multi-die assemblies will be the predominant approach, and most of the circuitry will not be 2nm or below. While these systems are inherently more flexible, the number and complexity of tradeoffs required for optimizing PPA/C are increasing. The rollout of 2nm process nodes and ... » read more

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