A crossbar array of magnetoresistive memory devices for in-memory computing


Samsung has demonstrated the world’s first in-memory computing technology based on MRAM. Samsung has a paper on the subject in Nature. This paper showcases Samsung’s effort to merge memory and system semiconductors for next-generation artificial intelligence (AI) chips. Abstract "Implementations of artificial neural networks that borrow analogue techniques could potentially offer low-po... » read more

Week In Review: Manufacturing, Test


Chipmakers, OEMs TSMC reported sales of $15.736 billion for the fourth quarter of 2021, up 5.7% sequentially. Net income grew 6.4% quarter-over-quarter. In the fourth quarter, shipments of 5nm accounted for 23% of total wafer revenues, while 7nm accounted for 27%. In the first quarter of 2022, TSMC’s sales are expected to be between $16.6 billion to $17.2 billion. TSMC also expects its 20... » read more

Week In Review: Design, Low Power


Nvidia again made its case for acquiring Arm to the UK's Competition and Markets Authority (CMA). “Arm is a private for-profit business at a crossroads. After acquiring Arm several years ago, SoftBank increased Arm’s headcount, hoping to spur long-term growth in several markets, including data center and personal computer, long dominated by Intel and x86. SoftBank’s investment phase has c... » read more

Week In Review: Auto, Security, Pervasive Computing


Security Kyocera is using Rambus’ RT-130 Root of Trust and AES-IP-38 AES Accelerator IP for data security on Kyocera Evolution Series MFPs (multi-function printers). Connected printers are notorious targets for malicious actors to gain access a network or data. The Evolution Series MFPs’ data security mets Federal Information Processing Standards (FIPS) 140-2 Cryptographic Module Validatio... » read more

Bug Hunt! Spiraling In On Formal Coverage Closure


By Mark Eslinger and Jin Hou Many companies have used formal verification to verify complex SoCs and safety-critical designs. Using formal verification to confirm design functionalities and to uncover functional bugs is emerging as an efficient verification approach. Although formal verification will not handle the complexity of a design at the SoC level, it is an efficient tool to verify th... » read more

A Minimal RISC-V


Microcontrollers exist in almost everything, but can RISC-V satisfy the needs of this market? Is it small enough to replace 8-bit processors? What might help people migrate to a more modern processor architecture? RISC-V defines a 32-bit processor instruction set architecture (ISA) that is open source and free to be implemented in any number of ways. It is touted for being a very small and e... » read more

The Ethernet Standard: To IP And Beyond


Ethernet is ubiquitous—it is the core technology that defines the Internet and serves to connect the world in ways that people could not imagine even one generation ago. HPC clusters are working on solving the most challenging problems facing humanity—and cloud computing is the service hosting many of the application workloads struggling with these questions. While alternative network infra... » read more

Where Do The Chips Fall In The Energy Transformation?


The energy industry is in the first stages of a once-in-a-century transformation. And one of the most important aspects of this shift is that EVs, solar farms grid equipment, and appliances will inherently rely more on digital technologies. As Hamed Heyhat, General Manager of Grid Automation at General Electric, says, “Decarbonization cannot happen without digitization of the grid.” So h... » read more

SOT-MRAM To Challenge SRAM


In an era of new non-volatile memory (NVM) technologies, yet another variation is poised to join the competition — a new version of MRAM called spin-orbit torque, or SOT-MRAM. What makes this one particularly interesting is the possibility that someday it could supplant SRAM arrays in systems-on-chip (SoCs) and other integrated circuits. The key advantages of SOT-MRAM technology are the pr... » read more

Advancing Signaling Rates To 64 GT/s With PCI Express 6.0


From the introduction of PCI Express 3.0 (PCIe 3.0) in 2010 onward, each new generation of the standard has offered double the signaling rate of its predecessor. PCIe 3.0 saw a significant change to the protocol with the move from 8b/10b to highly efficient 128b/130b encoding. The PCIe 6.0 specification, now officially released, doubles the signaling rate to 64 gigatransfers per second (GT/s) a... » read more

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