The Road To Super Chips
By Ed Sperling - 27 Jan, 2025 - Comments: 0

Reticle size limitations are forcing chip design teams to look beyond a single SoC or processor in order to achieve orders of magnitude improvements in processing that are required for AI. But moving data between more processing elements adds a whole new set of challenges that need to be addressed at multiple levels. Steve Woo, distinguished inventor and fellow at Rambus, examines the benefits ... » read more

What IoMT Really Stands For
By Brad Jolly - 27 Jan, 2025 - Comments: 0

The basic goals of engineering include the achievement of a product’s purpose, safety, cost, manufacturability, and supportability, among other things. For internet of things (IoT) applications, much of the essential purpose relates to wireless communications that untether communication from wires and cables. This is especially true of the rapidly growing internet of medical things (IoMT), wh... » read more

Assembly Design Rules Slowly Emerge
By Bryon Moyer - 27 Jan, 2025 - Comments: 0

Process design kits (PDKs) play an essential in ensuring that silicon technology can proceed from one generation to the next in a manner that design tools can keep up with. No such infrastructure has been needed for packaging in the past, but that's beginning to change with advanced packages. Heterogeneous assemblies are still ramping up, but their benefits are attracting new designs. “Chi... » read more

SRAM With Mixed Signal Logic With Noise Immunity in 3nm Nanosheet (IBM)
By Technical Paper Link - 24 Jan, 2025 - Comments: 0

A new technical paper titled "SRAM and Mixed-Signal Logic With Noise Immunity in 3nm Nano-Sheet Technology" was published by researchers at IBM T. J. Watson Research Center and IBM. Abstract "A modular 4.26Mb SRAM based on a 82Kb/block structure with mixed signal logic is fabricated, characterized, and demonstrated with full functionality in a 3nm nanosheet (NS) technology. Designed macros ... » read more

Electronic and Transport Properties of Six TMD Heterostructures
By Technical Paper Link - 24 Jan, 2025 - Comments: 0

A new technical paper titled "Computational Assessment of I–V Curves and Tunability of 2D Semiconductor van der Waals Heterostructures" was published by researchers at Chalmers University of Technology. Abstract "Two-dimensional (2D) transition metal dichalcogenides (TMDs) have received significant interest for use in tunnel field-effect transistors (TFETs) due to their ultrathin layers... » read more

Analog Accelerator For AI/ML Training Workloads Using Stochastic Gradient Descent (Imperial College London)
By Technical Paper Link - 24 Jan, 2025 - Comments: 0

A new technical paper titled "Learning in Log-Domain: Subthreshold Analog AI Accelerator Based on Stochastic Gradient Descent" was published by researchers at Imperial College London. Abstract "The rapid proliferation of AI models, coupled with growing demand for edge deployment, necessitates the development of AI hardware that is both high-performance and energy-efficient. In this paper, w... » read more

Chip Industry Week In Review
By The SE Staff - 24 Jan, 2025 - Comments: 0

The new Trump administration was quick to put a different stamp on the tech world: President Trump rescinded a long list of Biden’s executive orders, including those aimed at AI safety and the mandate for 50% EVs by 2030. Roughly 1.3 million EVs were sold in the U.S. in 2024, up 7.3% from 2023. The new administration announced $500 billion ($100 billion initially) in private sector in... » read more

Reverse Engineering Approach for Evaluating HW IP Protection ( U. of Florida, Indiana U.)
By Technical Paper Link - 23 Jan, 2025 - Comments: 0

A technical paper titled "Library-Attack: Reverse Engineering Approach for Evaluating Hardware IP Protection" was published by researchers at University of Florida and Indiana University. Abstract "Existing countermeasures for hardware IP protection, such as obfuscation, camouflaging, and redaction, aim to defend against confidentiality and integrity attacks. However, within the current thr... » read more

An Innovative Hybrid Cleaning Approach For Contaminant Removal in Semiconductor Packaging
By Chun Yuan Lim - 23 Jan, 2025 - Comments: 0

The growing demand for power semiconductors, which control large currents and voltages, has resulted in their widespread use in various electronic devices, including electric vehicles (EVs). The requirement for greater performance and smaller devices has led to increased operating temperatures for these power semiconductors. This rise in temperature poses a challenge as it often leads to delami... » read more

More Than Meets The Eye: Trends In Lithography
By Travis Brist - 23 Jan, 2025 - Comments: 0

Lithography, once the exclusive domain of artists and printmakers, also lies at the heart of integrated circuit (IC) production. The process of shining light on a substrate through a photomask to control exposure has been around since the 1960s and has been the key part of improving IC fabrication process resolution. At the time, the light sources used were in the human-visible spectrum, which ... » read more

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