Maximizing Signal Integrity: Fine-Tuning Via Impedance In HDFO Architectures
By Tsung Ting Lee - 22 May, 2025 - Comments: 0

The most different aspect between a normal lamination structure and High-Density Fan-out (HDFO) is the routing scale. That aspect is also the challenge and focus of this study. At an HDFO scale, most of the electrical properties cannot be measured by instruments. Therefore, this study uses the indirect method to determine the impedance information of the via and match the impedance. Since the v... » read more

Revolutionizing Semiconductor Development With GPU-Enhanced Atomistic Modeling
By Anders Blom - 22 May, 2025 - Comments: 1

There are many challenges in the development of a modern semiconductor chip, from front-end architecture simulation to final signoff. Volume manufacturing has its own set of challenges, while silicon lifecycle management (SLM) extends into field deployment and aging concerns. Underlying this entire development flow, however, lie the materials used to build the actual chips. Guiding the explorat... » read more

Cooling Chips Still A Top Challenge
By Bryon Moyer - 22 May, 2025 - Comments: 0

Increasing levels of semiconductor integration means more work needs to be done in smaller spaces, which in turn generates more heat that needs to be dissipated. Managing heat dissipation in advanced node dies and in multi-die assemblies is critical to their functionality and their longevity. And while much of the focus has been on improving power efficiency, which reduces the rate of power ... » read more

Mask Complexity, Cost, And Change
By Gregory Haley - 22 May, 2025 - Comments: 0

Experts at the Table: As leading-edge lithography nodes push further into EUV and beyond, mask-making has become one of the most critical and costly aspects of semiconductor manufacturing. At the same time, non-EUV applications are stretching the lifetime of older tools and processes, challenging the industry to find new solutions for both ends of the spectrum. Semiconductor Engineering sat dow... » read more

Laser-Focused Results: Improving EUV Line Edge Roughness With Ion Beam Etching
By Timothy Yang - 22 May, 2025 - Comments: 1

Extreme ultraviolet (EUV) lithography exposed resist patterns can exhibit excessive line edge roughness (LER) and line width roughness (LWR) due to random or shot noise. Increasing the EUV exposure dose can reduce LER/LWR, but it also decreases wafer throughput, which is highly undesirable given the EUV tool’s high operating costs. Ion beam etching (IBE) can directionally etch away roug... » read more

Molybdenum: Transforming Semiconductor Manufacturing For Next-Generation Technologies
By Lam Research - 22 May, 2025 - Comments: 0

One trillion semiconductors produced in a single year. A digital foundation powering AI's explosive growth. The next frontier requires chips that are smaller, faster, and exponentially more powerful. A new white paper from Counterpoint Research  reveals how advanced metallization—specifically molybdenum—is becoming a critical enabler for semiconductor manufacturing in this new era. Th... » read more

Energy-Efficient Computing Systems For Sustainable AI
By Pushkar Apte - 22 May, 2025 - Comments: 0

As artificial intelligence (AI) proliferates rapidly, AI models and datasets are also growing rapidly in size. This growth far outpaces performance improvement in hardware systems, and is increasing AI’s energy consumption unsustainably. To address these challenges and explore collaborative solutions, SEMI’s Smart Data-AI Initiative – as part of its Future of Computing focus – r... » read more

New Package Solutions for Automotive Optical Sensors
By Amkor - 22 May, 2025 - Comments: 0

This article introduces the development of a new optical ball grid array (OBGA) packaging platform designed for automotive applications, with a focus on platform development and compliance with the Automotive Electronics Council (AEC) AEC-Q100 Grade 2 reliability standard. The proposed packaging solution extends beyond traditional cavity OBGA packages, which have been primarily utilized for mic... » read more

Advanced Packaging Depends On Materials And Co-Design
By Katherine Derbyshire - 22 May, 2025 - Comments: 0

Multi-die assemblies offer significant opportunities to boost performance and reduce power, but these complex packages also introduce a number of new challenges, including die-to-RDL misalignment, evolving warpage profiles, and CTE mismatch. Heterogeneous integration — an umbrella term that covers many different applications and packaging requirements — holds the potential to combine com... » read more

Optimization Approach For The Dispensing of Thermal Interface Material (KIT, Robert Bosch)
By Technical Paper Link - 21 May, 2025 - Comments: 0

A new technical paper titled "TIMtrace: Coverage Path Planning for Thermal Interface Materials" was published by researchers at Karlsruhe Institute of Technology (KIT) and Robert Bosch GmbH. Abstract "Thermal Interface Materials are used to transfer heat from a semiconductor to a heatsink. They are applied along a dispense path onto the semiconductor and spread over its entire surface once ... » read more

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