Building A More Secure U.S. Microelectronic Design Infrastructure

Building in end-to-end supply chain security.


The security of the U.S. microelectronic designs and their supply chain is becoming a significantly growing concern for both commercial semiconductor companies and the Department of Defense (DoD). The industry has seen significant impact from both silicon shortages and vulnerabilities that have caused disruption in the assurance of microelectronics that power our autonomous vehicles, 5G, and countless IoT applications. Providing infrastructure for rapid prototyping and development of secure, cutting-edge microelectronics in the U.S. using the latest commercial technologies is critical to the design, manufacture, and delivery of silicon with the highest levels of security assurance.

To address this, the DoD announced the award of the Rapid Assured Microelectronics Prototypes using Advanced Commercial Capabilities (RAMP) Phase II program to Microsoft, focused on bringing critical microelectronic infrastructure to the U.S. using commercially available cloud environments provided by Microsoft Azure. RAMP is a critical initiative that will enable the DoD to accelerate the pace of microelectronics innovation by leveraging a more secure and scalable supply chain. A core component of the RAMP Phase II program is for Microsoft to provide a secure silicon design environment on Azure to help develop innovative microelectronic designs with quantifiable assurance.

Over the years, we have worked closely with our defense industrial base (DIB), commercial semiconductor, and electronic design automation (EDA) partners to enable systematic security verification with our Radix software to identify silicon vulnerabilities early in their development and enable quantifiable security assurance throughout the design process.

Radix is applied in lockstep with chip design, allowing security vulnerabilities to be cost-effectively remediated as they are found, throughout the design and development process. It adds systematic hardware vulnerability detection and prevention to existing ASIC, SoC, and FPGA verification methodologies using its comprehensive information flow analysis technology. By bringing more precise and more systematic security practices to every step of the development process, it helps to efficiently identify and remediate hardware security vulnerabilities and provides for oversight and governance to confirm security sign-off before manufacturing.

Throughout the program, Tortuga Logic will work closely with other technology partners. All work will be performed using Microsoft’s Azure Government Cloud to ensure the confidentiality and integrity of the selected designs and analysis are protected, and to enable this innovative secure design environment for building assurance into our next-generation microelectronics.

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