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Week In Review: Design, Low Power


RISC-V RISC-V International announced four new specification and extension approvals. Efficient Trace for RISC-V defines an approach to processor tracing that uses a branch trace. RISC-V Supervisor Binary Interface architects a firmware layer between the hardware platform and the operating system kernel using an application binary interface in supervisor mode to enable common platform services... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive, mobility The U.S. Department of Transportation’s National Highway Traffic Safety Administration (NHTSA) published a notice of proposed rulemaking (NPRM) to change the regulations on event data recorders (EDRs) to extend the EDR recording period for “timed data metrics from 5 seconds of pre-crash data at a frequency of 2 Hz to 20 seconds of pre-crash data at a frequency of 10 Hz... » read more