category: Everything Low Power

category: IoT, Security & Automotive

OIP Ecosystem Forum 2020
By Paul McLellan - 10 Sep, 2020 - Comments: 0

Last Tuesday was the virtual TSMC OIP Ecosystem Forum. Apart from being virtual, the format was similar to the usual. Cliff Hou, Senior Vice President of Technology Development, opened the day with a summary of where everything is in the ecosystem around each of the new processes. There were then three keynotes by the leaders of the three big EDA companies. That was followed by more technical ... » read more

Make Acute Angles A Sharp Problem Of The Past
By Tyler Lockman - 13 Aug, 2020 - Comments: 0

Sharp angles, whether they create a spike in a poured shape or form an acid trap between two different pieces of metal, are a problem for us all. As designers, we will go out of our way to try and avoid creating these situations; they will still creep into your design despite the best of intentions. How, then, can you efficiently rid your design of them with the minimal change to your routin... » read more

Enabling Cost-Effective, High-Performance Die-to-Die Connectivity
By Thomas Wong - 09 Jul, 2020 - Comments: 0

System advances in accelerated computing platforms such as CPUs, GPUs and FPGAs, heterogeneous systems on chip (SoCs) for AI acceleration and high-speed networking/interconnects have all pushed chip integration to unprecedented levels. This requires more complex designs and higher levels of integration, larger die sizes and adopting the most advanced geometries as quickly as possible. Facing th... » read more

Models Built With Water
By Paul McLellan - 11 Jun, 2020 - Comments: 0

A couple of years ago I wrote a post using the famous quote by statistician George Box: All Models Are Wrong; Some Are Useful. In that post, I discussed paper and plastic airplanes, but mostly I talked about modeling in computers, and especially what I call the "digital illusion." The digital illusion is the idea that signals in digital chips are ones and zeros, with timing, and not analog vol... » read more

Choosing Between Static and Dynamic Shapes
By Tyler Lockman - 14 May, 2020 - Comments: 0

That title might be a touch misleading. We’re not here to talk about why to convert shapes between static and dynamic. Rather, I want to talk about why you should NOT be doing this. Every design has some conductor shapes in it (or at least a very large percentage of them). What style to use is a choice that will impact performance through your entire flow; let the shape’s purpose guide you.... » read more

Easier Bond Finger Solder Mask Openings
By Tyler Lockman - 09 Apr, 2020 - Comments: 0

If you design wire bond packages, you’re familiar with the need for the bond fingers and rings on the package substrate layers to be exposed through the solder mask layer. If they aren’t, it becomes… rather difficult… to bond the wire to them, after all! We talked about general-purpose bounding shapes a few weeks ago in “A Boundless Bounty of Bounding Shapes”. Bond fingers have a... » read more

Demystifying Mirror Types
By Tyler Lockman - 12 Mar, 2020 - Comments: 0

I’m not talking about carnival funhouse mirrors, but rather the different options for mirroring symbols, vias, and bond fingers in your IC Package layout. The Allegro Package Designer Plus and SiP Layout tools have two distinct styles of mirroring which are used in different places. Often, I get questions about what, exactly, those differences are. And even more, why the styles are used for d... » read more

Moore And More
By Paul McLellan - 13 Feb, 2020 - Comments: 0

For more than 50 years, the semiconductor industry has enjoyed the benefits of Moore's Law — or so it seemed. In reality, there were three laws rolled up into one: Each process generation would have a higher clock speed at the same power. This was not discovered by Moore, but by Dennard, who also invented the DRAM. Process generations continue to get faster and lower power, but the power... » read more

Brains And Computers At The VLSI Design Conference
By Madhavi Rao - 16 Jan, 2020 - Comments: 0

One of the industry’s biggest events, the VLSI Design Conference, took place in Bangalore last week. This conference does a round-robin of cities, and this was the 10th time in its 33-year history that Bangalore was hosting it (the last time was in 2015). This year’s conference attracted over 1,800 technologist and leaders over five days – a huge turnout for this growing industry. Inci... » read more

System-in-Package For Heterogeneous Designs
By Paul McLellan - 12 Dec, 2019 - Comments: 1

System integration is increasingly being done using 3D packaging technologies rather than integrating everything onto a huge SoC. One motivation is the ability to not just to split up a design in a single process, but to package die from different processes. Sometimes there are economic reasons. Several presentations at HOT CHIPS had a partition of the design into the processor itself, and a... » read more

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