What’s Next for System-Level Power Modeling?


Availability of models and libraries has long been one of the biggest barriers to the adoption of new EDA tools and methodologies, whether due to the investment needed to create these models and libraries or because of the “at-risk” nature of developing complex models in proprietary formats. With the approval of UPF3.0 (IEEE 1801-2015) this past December, we now have an industry standar... » read more

New Twist On Scalable Electronics?


Snug in their tents at Everest base camp a few years ago, Matt Du Puy and his colleagues marveled at the howling snowstorm outside, until they peeked out and saw snow drifts piling up quickly. They made a quick decision to tug on their boots and seek safer ground. As they did, clutches of other campers emerged and fell in line, bleary-eyed refugees trudging through the darkness. “We got of... » read more

Keeping NFCs Secure


Short-range communications, including near-field and semi-near-field communications such as Bluetooth, AirDrop, and Zigbee, have become as much a part of our daily lives as our mobile devices. Through some incredible engineering and standards efforts, they have achieved low-power communication over short distances with remarkable accuracy and consistency. But as even more devices begin tapping ... » read more

Achieving Numerical Precision And Design Customization With Flexible Floating-Point IP


Floating-point operations in application-specific hardware have gained in popularity mostly because they are easier to use than fixed-point operations and they are a better match to numerical behavior in software algorithms. Fixed-point operations present design challenges in the definition of input/output ranges and internal precision for each operation. On the other hand, floating-point opera... » read more

Power Analysis Plus Power Management


In my earlier blogs we've heard from some of the experts on using UPF in the successive refinement flow. We’ve talked about controlling leakage power, bringing power down, and validating power management behavior using coverage and simulation, including debug and clock domain crossing verification. In order to do the last step in the successive refinement flow, you need to use emulation be... » read more

TSMC: Onward to 5nm


TSMC’s financial results for the Q4 of 2015 were released in January and showed an 8.5% revenue drop compared to the previous year, and a 3.5% decrease compared to Q3 (all in NT$). For the full year though, TSMC said it had again achieved record sales, with revenue for the full year up over last year by 10.6% in NT$ (5.7% in US$). President and co-CEO Mark Liu reported that TSMC sees a red... » read more

Simulating For Security


When we think of the field of cryptography, we often tend to think of math-intensive software encryption schemes, algorithms trying to prevent sensitive data from getting into the wrong hands, and hackers poring over code searching for potential loopholes in data sent over secure channels. However, we must also consider the fact that data has to physically make its way through transistors, p... » read more

Getting Ready For The IoT


A major change is underway in the semiconductor industry, and it is being driven by the Internet of Things. Gartner defines the IoT as a “network of dedicated physical objects (things) that contain embedded technology to sense or interact with their internal state or external environment. The IoT comprises an ecosystem that includes things, communication, applications and data analysis.” ... » read more

A Winning Formula


It may be fitting that DVCon will be held the same week as Super Tuesday this year, the day when the greatest number of states in the U.S. hold primary elections. Big dollar expenditures and return on investment (ROI) strategies are part of today’s political landscape, as they are with chip design and verification. Missing a delivery window for an electronics device can cost 25% or more o... » read more

Working With FinFETs


One of the key technology trends driving semi-conductor industry is the adoption of finFET processes. As opposed to a traditional planar transistor, the finFET has an elevated channel or “fin,” which the gate wraps around. Due to their structure, finFETs generate much lower leakage power and allow greater device density. Compared to planar transistors, finFET operate at a lower voltage and ... » read more

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