The Road To 5nm


There is strong likelihood that enough companies will move to 7nm to warrant the investment. How many will move forward to 5nm is far less certain. Part of the reason for this uncertainty is big-company consolidation. There are simply fewer customers left who can afford to build chips at the most advanced nodes. Intel bought Altera. Avago bought Broadcom. NXP bought Freescale. GlobalFoundrie... » read more

How Will 5G Work?


Sumit Tomar, general manager of the Wireless Infrastructure Products Group at RF chip giant Qorvo, sat down with Semiconductor Engineering to discuss the development of next-generation 5G wireless networks and other topics. In 2014, RF Micro Devices and TriQuint merged to form Qorvo. What follows are excerpts of that conversation. SE: 5G, the follow-on to the current wireless standard known ... » read more

Pattern Matching In Test And Yield Analysis


By Jonathan Muirhead and Geir Eide It’s no secret that a successful yield ramp directly impacts integrated circuit (IC) product cost and time-to-market. Tools and techniques that help companies ramp to volume faster, while also reducing process and design variability, can be the difference between profit and loss in a competitive market. And while pattern matching technology has been aroun... » read more

IMEC Partner Technical Week Review


In March 2016, Coventor was invited to the biannual Partner Technical Week (PTW) at IMEC in Leuven, Belgium. IMEC, a world-leading research group in nanotechnology, organizes their Partner Technical Week every six months to present scientific results to their partners. During this week, a number of specialists from IMEC's many partner companies also discuss their progress in areas related to IM... » read more

Why IP Subsystems And Why Now?


At the recently concluded DAC 2016 conference in Austin, Texas, I had the opportunity to participate in a tutorial on IP Subsystems on Wednesday the 8th. Also participating were Marco Brambilla, Director of Engineering at Synapse Design and Drew Wingard, CTO at Sonics. The reality today is that device complexity in many applications has risen to levels that require increasing amounts of disc... » read more

Successful FlexTech Integration Providing New Opportunities for SEMI Members


By Michael Ciesinski, President, FlexTech In 2014, SEMI developed a new model – SEMI Strategic Association Partnership – for engaging other associations and organizations in a strategic, long-term relationship that supports and advances the interests of SEMI members in emerging and adjacent segments of the electronics supply chain. The strategic partner brings a community, brand, and pro... » read more

Pathfinding Beyond FinFETs


Though the industry will likely continue to find ways to extend CMOS finFET technology further than we thought possible, at some point in the not-so-distant future, making faster, lower power ICs will require more disruptive changes. For something that could be only five to seven years out, there’s a daunting range of contending technologies. Improvements through the process will help, from E... » read more

Overcoming RC In Memory Scaling


In a memory device, Ohmic contacts (semiconductor-to-metal interfaces) connect the active region and the metal wiring. To achieve rapid and maximal charge transmission across the Ohmic contact, a low-resistivity material is used. Low-resistivity Co silicide has been adopted as the industry standard for this purpose; its effectiveness relies on the deposition of a sufficiently thick layer to for... » read more

RC Delay: Bottleneck To Scaling


R = resistance — the difficulty an electrical current has in passing through a conducting material. C = capacitance — the degree to which an insulating material holds a charge. RC delay = the delay in signal speed through the circuit wiring as a result of these two effects. RC delay is important because it can become a significant obstacle to continued downward scaling of logic and... » read more

The Other Side Of Device Scaling


The push to 10nm and 7nm is a relatively straightforward path in PowerPoint. In multiple presentations across the semiconductor industry, in fact, it has been portrayed as a straight line progression spanning decades. While most chipmakers are aware that the cost per transistor has been increasing below 22nm, due to double patterning and the challenges in designing finFETs and dealing with d... » read more

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