Fill Challenge Solved: Why SmartFill is as Good as it Sounds


by Jean-Marie Brunet Among the many steps involved with chip design, there is one known by the deceptively simple name of “fill.” Fill involves adding shapes or polygons to the design that are structural, not logical. That is, they ensure manufacturability by making sure each layer (metal, poly, diffusion) has a proscribed density. As easy as this sounds, fill can be tricky, and the fill... » read more

Tennant’s Law


It’s hard to make things small.  It’s even harder to make things small cheaply. I was recently re-reading Tim Brunner’s wonderful paper from 2003, “Why optical lithography will live forever” [1] when I was reminded of Tennant’s Law [2,3].  Don Tennant spent 27 years working in lithography-related fields at Bell Labs, and has been running the Cornell NanoScale Science and Techno... » read more

Different wavelengths from one material – a new freedom in LED design


By Michael P.C. Watts When light is emitted from a particle that contains a few hundred atoms, the wavelength of the light is affected by the size of the region – this is a very interesting quantum effect that provides a way of tuning wavelengths of Light Emitting Diodes (LED) independent of the band-gap of the material. In particular, there is a possibility of creating a white LED or a gr... » read more

Cold and Rainy Weather at Semicon Japan Doesn’t Dampen Industry Enthusiasm


By Joanne Itow Last week I attended my first Semicon Japan. This is typically one of the largest Semicon events, but considering the lull in equipment sales since this summer combined with the Japan earthquake in March, I was uncertain what to expect. Seating at the opening keynote and welcome presentations were standing room only, but the foot traffic on the show floor was far from overwh... » read more

To Cut or Not To Cut? That is the Double Patterning Question


By David Abercrombie The challenges of double pattering (DP)-based design are looming large to those customers starting to move to the 20 nm technology node. Of course, much of the fear and trepidation is simply due to it being something new to learn, and the sense of risk that a move into the unknown can instill. Regardless of emotions involved, DP does place new restrictions on physical la... » read more

MEMS Oscillators Market News – Accelerating Adoption of silicon MEMS timing


By Tony Massimini Recently there have been two major announcements in the MEMS Oscillator market. Market leader SiTime breaks into the high-precision OCXO timing with Stratum 3 compliant solutions. Integrated Device Technology jumps into the MEMS oscillator market with a piezoelectric MEMS resonator. SiTime has introduced the SiT5301 and SiT5302 which address the highest performance applica... » read more

FD-SOI bests FinFETs for mobile multimedia SOCs? ST says yes.


In a recent and excellent article in ASN by Thomas Skotnicki, Director of the Advanced Devices Program at STMicro, he explains in a very clear and accessible way why FD-SOI with ultra-thin Body & Box (UTBB) is a better solution for mobile, multimedia SOCs than FinFETs -- starting at the 28nm node and running clearly through 8nm.  It is based on the paper he presented at the 2011 IEEE SOI C... » read more

ARM: Bulk ports directly to FD-SOI


In a recent ASN posting, ARM Fellow Jean-Luc Pelloie said that bulk logic designs can be ported directly to fully-depleted (FD)-SOI for high-performing, low-power mobile apps. ARM sees fully-depleted FD-SOI is a potential alternative to BULK 20nm.  Jean-Luc addressed the question of  what sort of impact a port from bulk FD-SOI would  have on the design flow. His answer is: very little. ... » read more

Mighty Japan Endures as Leader


By Christian Gregor Dieseldorff After the devastating natural disaster in March, Japan’s semiconductor industry has once again proven that it can overcome disaster and recover quickly. Japan is home to a large number of semiconductor companies and has the largest share of total installed fab capacity. In addition, fabs in Japan lead in cutting-edge technology such as 24nm and 19nm NAND Fla... » read more

Smart Money in Analog


By Joanne Itow Recently Semico released a report touting the above average growth rates in the analog market as well as the healthy revenue per wafer for analog products.  Smart money is moving into power management and other analog applications which have gained in popularity in our mobile electronic world. Over the next five years, semiconductor units will grow at a CAGR of 9.6%.  The... » read more

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