Simplifying The Path From Design To Test


By Richard Fanning and John Rowe Getting an integrated circuit (IC) from design to test is an arduous process that encompasses a number of steps, including: Design for Test (DFT): processes that ensure the chip is designed in such a way that it can be tested Development: the development of automated test programs (ATPs) Bench: evaluating the device at the bench to ensure the desig... » read more

The Future Of Connectivity Is Higher Data Rates And Micro-Positioning


These days, we tend to take global wireless connectivity for granted. Whether we’re in a coffee shop, a hotel room, or a plane at 35,000 feet, chances are that we’ll be able to enjoy Internet access at reasonable speeds. But despite this constant connectedness, we still manage to misplace our keys and forget where we left our smartphones. New connectivity technologies are promising to ha... » read more

The Future Of Wireless Test Is Over The Air


The deployment of mmWave technology is synonymous with 5G rollout and the initial results for faster links are amazing. For example, using a mmWave band, the prospects of a 1-2 Gbps link means a typical HD movie can download in less than a minute. An upload link of 30 Mbps also enables the transfer of videos back to the cloud at a record pace. These user experiences are enabled by the antenna l... » read more

The Great Migration To 5G Is Underway


Every decade brings with it a plethora of technology changes, and the cumulative effects of 50+ years of changes in wireless technologies are noteworthy for how they have changed the way we communicate. The 80’s began the era of personal computing along with 1G rollout The 90’s saw the advent of 64-bit microprocessor architecture in consumer devices coinciding with 2G rollout The... » read more

Minimizing Execution Risk In Test Solution Development


Test development projects are a mix of engineering disciplines with a complex and interdependent ecosystem. The ability to assess risks and their impact on the entire project can be the difference between success and failure. A technical project lead provides a single point of responsibility for assessing technical risk across the project, developing mitigation plans, and driving countermeasure... » read more

Semiconductor Test: Staying Ahead Of Nanodevices


In the semiconductor fabrication process, engineers continue to innovate, enabling smaller transistors and higher density circuits. The transition to finFETs allowed 7nm and 5nm processes to realize circuits of amazing density, and the progress of nanosheet transistors provides confidence in the future advancement of digital circuit cost reduction and performance improvement. As individual t... » read more

Semiconductor Test In The Gate All Around Era


The past two years have witnessed unprecedented growth in the semiconductor industry, driven by advances in artificial intelligence, natural language processing, automated vehicles, and augmented and virtual reality. All of these applications depend heavily on advancements in semiconductors to meet their needs for enormous computational processing and communication bandwidth to makes sense of t... » read more

Detecting Spatial Blotches In Image Sensor Devices


One of the most common defects in image sensor devices is spatial blotches. The appearance of blotches in image sensors is a regular occurrence and may be generated by internal moving parts or may be moved by air currents within the camera. Composed of two main statistical methods, the first module employs an inferential method, applying a spatial segmentation of the current frame to obtain ... » read more

Site-To-Site Variation In Parallel Test


From wafer to system level test, parallel test execution delivers significant benefits, including reduced costs, yet it’s never as simple as that PowerPoint slide you present to management. An engineering effort is required to balance the thermo-electrical challenges that occur as you increase the number of sites to be tested, or the number of slots in a burn-in oven or system level te... » read more

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