中文 English

58th DAC Online Program Is Now Live


We did it. After more than a year’s worth of hard work the DAC Executive Committee finally released the 58th DAC program, despite a mountain of challenges and hurdles we encountered along the way this past year. We started planning the 58th DAC a little over a year ago, and we were confronted with a lot of uncertainty on what to expect for the coming year. Would submissions be down? Would ... » read more

Education Vs. Training


While writing my recent articles on the subject of training, a number of people pointed out that training and education are not the same thing. In a very simple sense, training is defined to be learning a skill or behavior that enables you to 'do' something, whereas education is the acquisition of knowledge from study or training. These definitions leave me cold and, in my mind, miss a very ... » read more

The Top Five Areas For 5G Improvements


A recent article by TECHnalysis's Bob O'Donnell sparked some thoughts about the critical aspects in which 5G faces improvement needs. They include coverage, cost, power, killer applications, and global ecosystems. It will be a fascinating race over the next eight to ten years, and many decisions between the evolution of 5G versus a transition to 6G are much closer than one might think. I’v... » read more

Four Requirements To Improve Chip Design Debug


Debug has always been a painful and unavoidable part of semiconductor design and, despite many technological advances, it remains one of the dominant tasks in chip development. At one time, most bugs were detected and diagnosed on actual devices in the bring-up lab, where both visibility and controllability are severely limited. It is certainly true that debugging the results from pre-silicon t... » read more

Easing The Burden Of Early Bug Detection


Integrated circuit designers are under constant pressure to deliver bug free code that meets ever more rigorous requirements. It is well known that the more bugs that can be detected early in the development process, the faster and easier that development effort will be. However, early bug detection requires a verification overhead on the designer that can be onerous and impact the design proce... » read more

The Difference Between Processor Configuration And Customization


For many years, people have been talking about configuring processor IP cores, but especially with growing interest in the open RISC-V ISA, there is much more talk about customization. So, what is the difference? A simple analogy is to think of ordering a pizza. With most pizzerias, you have standard bases and a choice of toppings from a limited list. You can configure the pizza to the ... » read more

In-Design Signoff DRC For Productivity Improvement


Microsemi, a wholly-owned subsidiary of Microchip Technology, produces a portfolio of semiconductor and system solutions for communications, defense and security, aerospace, and industrial markets. In addition to high-performance and radiation-hardened analog/mixed-signal integrated circuits, FPGAs, SoCs and ASICs, they also design power management products, timing and synchronization devices, ... » read more

Rethink, Not Replicate


We should start to call COVID the Great Disrupter. It caused many things to change, ranging from how the industry has been tackling education, to supply chains, the ability to find products in stores, and the pricing and availability of materials, workers, and office space. I can't see anyone fully trusting just-in-time supply chains anymore, even though they sometimes provided financial advant... » read more

Choosing The Right Model Fidelity For Your Digital Twin


The EDA industry has advanced by leaps and bounds with innovation. Every time we approach a new technology node, many algorithms have to be re-imagined. As the late Jim Ready often pointed out to me, compared to the world of software development, these semiconductor technology changes are the hardware equivalent to what Fred Brooks, in his seminal article “No Silver Bullet—Essence and Accid... » read more

RISC-V Verification: The 5 Levels Of Simulation-Based Processor Hardware DV


By Lee Moore and Simon Davidmann The RISC-V open standard ISA (Instruction Set Architecture) offers developers the opportunity to configure the features and functions of a custom processor to uniquely address their target end application needs and requirements. RISC-V has a modular structure with many standard instruction extensions for additional dedicated hardware features such as Floating... » read more

← Older posts