category: Intelligent System Design

category: IoT, Security & Automotive

Top 15 Integrating Points In The Continuum Of Verification Engines
By Frank Schirrmeister - 30 Jul, 2015 - Comments: 0

The integration game between the different verification engines, dynamic and static, is in full swing. Jim Hogan talked about the dynamic engines that he dubbed “COVE”, and I recently pointed out a very specific adoption of COVE in my review of some customer examples at DAC 2015 in “Use Model Versatility Is Key for Emulation Returns on Investment”. Here are my top 15 integrating poin... » read more

Towards A Metric To Measure Verification Computing Efficiency
By Frank Schirrmeister - 25 Jun, 2015 - Comments: 1

Thinking back about DAC 2015 in San Francisco earlier this month, I am happy that at least some of my predictions came true—there was clearly a trend towards making verification smarter. However, one thing struck me while hearing all the discussions on connecting engines is what Jim Hogan called the continuum of verification engines (COVE)—and what we at Cadence call the system development ... » read more

Toward Smarter Design Automation
By Frank Schirrmeister - 28 May, 2015 - Comments: 0

In less than two weeks, the EDA industry will convene for its biggest conference of the year, the Design Automation Conference, again in San Francisco. Last year, I “came clean” with a post called “Confessions Of An ESL-Aholic,” pointing out that beyond high-level synthesis, a significant shift towards a more abstract design description than RTL has not yet happened and that a lot of th... » read more

A Fireside Chat With Imagination On Hardware-Assisted Development And Emulation
By Frank Schirrmeister - 13 May, 2015 - Comments: 0

During one of my trips to Europe I was able to sit down with Colin McKellar, senior director of hardware engineering at Imagination Technologies. He is my main contact for all things verification at Imagination. Imagination’s product challenges include maintaining the level of quality of their IP products within shorter timelines and dealing with integration of their IP into more complex c... » read more

How Health And Auto Requirements Drive IoT Design
By Frank Schirrmeister - 23 Apr, 2015 - Comments: 0

One of the fun parts of my job is that I am looking at the requirements of our customer’s customers quite a bit to understand where to focus our efforts on the tool side. As a follow on to my last post “System Design Enabling The Human Intranet,” this month I am looking at the requirements imposed on system design by health and automotive applications as they were discussed at DATE in Gre... » read more

System Design Enabling The Human Intranet
By Frank Schirrmeister - 26 Mar, 2015 - Comments: 0

Against the always-impressive backdrop of the French Alps, DATE took place earlier this month in Grenoble. DATE has quietly transformed from a European version of DAC into a very interesting technical conference with some very high-caliber attendees. This year, I had the pleasure to participate as session chair for the design tools section, themed “Designing Electronics for the Internet of Th... » read more

Getting The Right Return On Invested Power Consumption
By Frank Schirrmeister - 26 Feb, 2015 - Comments: 0

Three weeks ago, I participated in a panel on low power and modeling at the system level. It took place at DesignCon 2015 in Santa Clara, together with representatives from AMD, Avago, and Qualcomm. Interestingly enough, it gave me the opportunity to set some of the myths and dis-information about power consumption in emulation straight, but more on that later. The panel was moderated by Steve ... » read more

What Will 2015 Bring For System-On-Chip Verification?
By Frank Schirrmeister - 29 Jan, 2015 - Comments: 0

Starting a new year, I always look back at predictions from years past to see how far off they were from reality and try to understand why. Rolling back 10 years, IEEE Spectrum published its annual “Winners and Losers” issue. Looking back, three predictions stick out for me. The first one is about how we consume media. Back in the January 2005 issue of IEEE Spectrum, Internet Protocol T... » read more

Top-Down SoC Verification
By Frank Schirrmeister - 18 Dec, 2014 - Comments: 0

In the world of system-on-chip (SoC) verification, 2014 was an interesting year of transition. After much discussion throughout the year about graph-based techniques and the role of software for verification, we at Cadence ended the year with a bang – last week we announced Perspec System Verifier. The customers with whom we’ve been working on this product for years tell us that this is a b... » read more

The Next Big Shift In Verification
By Frank Schirrmeister - 20 Nov, 2014 - Comments: 1

We are coming to the end of the year—have you started your Christmas shopping list yet? For us bloggers, it is time for predictions about what the next year will bring in EDA technology. Three core trends will shape 2015—even more closely connected verification engines, innovations in hardware-assisted development, and software as a driver for verification. All three core trends are r... » read more

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