Toward Smarter Design Automation

Three trends that will drive discussions at this year’s Design Automation Conference.


In less than two weeks, the EDA industry will convene for its biggest conference of the year, the Design Automation Conference, again in San Francisco. Last year, I “came clean” with a post called “Confessions Of An ESL-Aholic,” pointing out that beyond high-level synthesis, a significant shift towards a more abstract design description than RTL has not yet happened and that a lot of the integration still happens at the RTL level. I stand by that observation. The basic premise of it is still valid and probably has become only more pressing.

I had pointed out that hybrid combinations of the different verification engines have helped to extend the applicability of RTL-based development in simulation, emulation, and FPGA-based prototyping. As a result, we are now at a stage at which all three big EDA vendors are promoting a “continuum of verification engines,” or COVE, as James Hogan called it recently. You can expect to see a lot of that at DAC.

In my view, the key trends to look out for this year at DAC are “smarter verification,” “software,” and “application-driven requirements.”

Like our lives in general, advanced verification will become smarter. Verification is shifting from a pure race on who can execute the most cycles the fastest to how smart verification can be. What are the right engines to be used in the continuum of verification engines, from TLM-based virtual prototyping to RTL-based simulation, acceleration, emulation, FPGA-based prototyping, and even the actual silicon? How can designs move between engines smartly? How can the engines be smartly connected in hybrid fashions? How can post-silicon validation and pre-silicon verification interact smartly? How can a verification environment be re-used smartly across engines, and which role will software and graphs play for verification? How can debug become smarter than PRINTFs and instead focus on the roots of the defects?

The current DAC program already shows a plethora of activities in this area, ultimately showing us how to implement the “shift-left” we have been talking about for a while now. Specifically we have arranged for a luncheon panel at noon Monday at DAC called, “How to Make Next-Generation Verification Smarter.” You can register here.

At our booth this year, we will have an Experts Bar to discuss these topics as well. Here are the verification-related topics on our agenda:

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As a second trend, software will become even more important—not only for its role in smart verification and ability to be re-used across engines, but also as content to be verified. How can one efficiently debug hardware-software interactions with synchronized debug? Which engines are the right ones for which part of the software? How can a user get to the point of interest fast and accelerate the boot up of operating systems? Can we optimize AnTuTu scores prior to silicon using verification engines?

DAC — together with the co-located Embedded TechCon — will bring, if not answers, then at least interesting discussions in this domain. Recently at CDNLive EMEA, both TI and ST talked about their software-driven verification technologies that involve our Perspec System Verifier technology. In addition, ARM and NVIDIA have recently been talking about their use of Palladium Hybrid technology at CDNLive Silicon Valley and EDPS, respectively. And we recently introduce our Indago Debug Platform that includes HW/SW debug. Check out our DAC theatre schedule for more information.

The third trend centers on application requirements driving design and tool developments. EDA has to understand what its customers are building and what their requirements are. This year’s DAC will focus on automotive and the co-located TechCon on the Internet of Things (IoT), not an application domain itself but an area that spans multiple application domains. In all those areas, topics like functional safety, security, design for low power, and mixed-signal will be the focus of discussions at DAC. For example, on automotive safety my colleagues Adam Sherer, Riccardo Oddone, and John Rose will talk about “Safety Compliance in Automotive Systems: Standards, Techniques, and Challenges” at 4:30pm on Wednesday, June 10 in Room 303.

Be prepared for the IoT discussions to extend well beyond the technical aspects. Several other concerns like safety and security will play a key role. Not everybody would like their current heartbeat, glucose levels, and location to be displayed on the San Francisco Giants ballpark’s big screen after the next big hack…

See you at DAC!

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